A114A Search Results

Contextual Info: SN54AHCT174, SN74AHCT174 HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS419D – JUNE 1998 – REVISED NOVEMBER 1999 D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Inputs Are TTL-Voltage Compatible Contain Six Flip-Flops With Single-Rail Outputs

Contextual Info: SN54AHCT594, SN74AHCT594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS417A – JUNE 1998 – REVISED OCTOBER 1999 D D 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QA SER RCLR RCLK SRCLK SRCLR QH′ SN54AHCT594 . . . FK PACKAGE TOP VIEW QD QE NC QF QG description

Contextual Info: SN54ALVTH32373, SN74ALVTH32373 2.5-V/3.3-V 32-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCES322 – FEBRUARY 2000 D D D D D D State-of-the-Art Advanced BiCMOS Technology ABT Widebus  Design for 2.5-V and 3.3-V Operation and Low Static-Power Dissipation

Contextual Info: SN54LV367A, SN74LV367A HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS398C – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN54AHC594, SN74AHC594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS423B – JUNE 1998 – REVISED NOVEMBER 1999 D D 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QA SER RCLR RCLK SRCLK SRCLR QH′ SN54AHC594 . . . FK PACKAGE TOP VIEW QD QE NC QF QG description

Contextual Info: SN74ALVCH16835 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS SCES053F – SEPTEMBER 1995 – REVISED OCTOBER 2000 D D D D Member of Texas Instruments’ Widebus  Family Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A

Contextual Info: SN74LVC1G06 SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT SCES295D – JUNE 2000 – REVISED DECEMBER 2000 D D D D DBV OR DCK PACKAGE TOP VIEW Supports 5-V VCC Operation Input and Open-Drain Output Accept Voltages up to 5.5 V Latch-Up Performance Exceeds 100 mA Per

Contextual Info: SN54AHCT594, SN74AHCT594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS417B – JUNE 1998 – REVISED NOVEMBER 1999 D D 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QA SER RCLR RCLK SRCLK SRCLR QH′ SN54AHCT594 . . . FK PACKAGE TOP VIEW QD QE NC QF QG description

Contextual Info: SN74LVC1G80 SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP SCES221D – APRIL 1999 – REVISED JANUARY 2001 D D D D DBV OR DCK PACKAGE TOP VIEW Supports 5-V VCC Operation Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per

Contextual Info: SN54AHC174, SN74AHC174 HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS425D – JUNE 1998 – REVISED JANUARY 2000 D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Operating Range 2-V to 5.5-V VCC Contain Six Flip-Flops With Single-Rail Outputs Applications Include:

SCLS352D

Contextual Info: SN54AHC123A, SN74AHC123A DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS SCLS352D – JULY 1997 – REVISED DECEMBER 1999 D D D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Operating Range 2-V to 5.5-V VCC Schmitt-Trigger Circuitry On A, B, and CLR

Contextual Info: SN54LVT244B, SN74LVT244B 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS354E – FEBRUARY 1994 – REVISED MARCH 2000 D D D D D D 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3

Contextual Info: SN74AVC16334 16-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS SCES154E – DECEMBER 1998 – REVISED SEPTEMBER 1999 D D D D D Member of the Texas Instruments Widebus  Family EPIC  Enhanced-Performance Implanted CMOS Submicron Process DOC  (Dynamic Output Control) Circuit

Contextual Info: SN54LV367A, SN74LV367A HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS398C – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN74AVC16373 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCES156D – DECEMBER 1998 – REVISED AUGUST 1999 D D D D D Member of the Texas Instruments Widebus  Family EPIC  Enhanced-Performance Implanted CMOS Submicron Process DOC  (Dynamic Output Control) Circuit

c07f

Abstract: MARKING C07F marking C075
Contextual Info: SN74LVC1G07 www.ti.com SCES296AA – FEBRUARY 2000 – REVISED JULY 2013 SINGLE BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT Check for Samples: SN74LVC1G07 FEATURES DESCRIPTION • This single buffer/driver is designed for 1.65-V to 5.5V VCC operation. 1 2 • •

u262

Contextual Info: SN74AUC1G126 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT www.ti.com SCES383J – MARCH 2002 – REVISED JULY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O

Contextual Info: SN74AHC04 SN54AHC04 www.ti.com SCLS231N – OCTOBER 1995 – REVISED MAY 2013 HEX INVERTERS Check for Samples: SN74AHC04, SN54AHC04 FEATURES 1 Operating Range 2-V to 5.5-V Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHC04 . . . JORWP ACKAGE SN74AHC04 . . . D,DB,DGV,N,NS,

c08r

Abstract: SN74LVC2G08-EP
Contextual Info: SN74LVC2G08 www.ti.com SCES198M – APRIL 1999 – REVISED NOVEMBER 2013 Dual 2-Input Positive-AND Gate Check for Samples: SN74LVC2G08 FEATURES DESCRIPTION • This dual 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation. 1 2 • • •

hp310

Contextual Info: SN65LVDS16, SN65LVP16 SN65LVDS17, SN65LVP17 www.ti.com SLLS625B – SEPTEMBER 2004 – REVISED NOVEMBER 2005 2.5-V/3.3-V OSCILLATOR GAIN STAGE/BUFFERS • FEATURES • • • Low-Voltage PECL Input and Low-Voltage PECL or LVDS Outputs Clock Rates to 2 GHz

Contextual Info: SN74LV573AT OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCES574C – JUNE 2004 – REVISED AUGUST 2005 FEATURES • • Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22

Contextual Info: SN74LVTH16245A-EP 3.3-V ABT 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com FEATURES • • • • • • • • • • • • • • • 1 Controlled Baseline – One Assembly – One Test Site – One Fabrication Site Enhanced Diminishing Manufacturing

Contextual Info: SN74LVC3G14 TRIPLE SCHMITT-TRIGGER INVERTER www.ti.com SCES367I – AUGUST 2001 – REVISED FEBRUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V

Contextual Info: SN74LVC821A 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS304J – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V