AD9751ASTRL Search Results

Contextual Info: a APPLICATIONS Communications: LMDS, LMCS, MMDS Basestations Digital Synthesis Quadrature Modulation LATCH DVDD LATCH PORT1 PORT2 CLK+ CLKCLKVDD PLLVDD CLKCOM DCOM The AD9751 has been optimized for ultra high speed applications up to 300MSPS where data rates exceed

Contextual Info: FEATURES 10-Bit Dual Muxed Port DAC 300 MSPS Output Update Rate Excellent SFDR and IMD Performance SFDR to Nyquist @ 25 MHz Output: 64 dB Internal Clock Doubling PLL Differential or Single-Ended Clock Input On-Chip 1.2 V Reference Single 3.3 V Supply Operation

AD9751

Abstract: 3310D 31B12 AD9751AST AD9751ASTRL AD9751-EB AWG2021 DG2020 HP8644
Contextual Info: FEATURES 10-Bit Dual Muxed Port DAC 300 MSPS Output Update Rate Excellent SFDR and IMD Performance SFDR to Nyquist @ 25 MHz Output: 64 dB Internal Clock Doubling PLL Differential or Single-Ended Clock Input On-Chip 1.2 V Reference Single 3.3 V Supply Operation

P1B00

Abstract: Flat Ribbon Connector 2x10 IDC Female 16 QAM Transmitter block diagram 1b07 SEV 1011 AD9751 AD9751AST AD9751ASTRL AD9751-EB AWG2021
Contextual Info: FEATURES 10-Bit Dual Muxed Port DAC 300 MSPS Output Update Rate Excellent SFDR and IMD Performance SFDR to Nyquist @ 25 MHz Output: 64 dB Internal Clock Doubling PLL Differential or Single-Ended Clock Input On-Chip 1.2 V Reference Single 3.3 V Supply Operation