AFTL Search Results

toshiba 7 pin a215

Abstract: A227
Contextual Info: TOSHIBA TC514800AJL/AFTL70/80 524,288 WORD X 8 BIT DYNAMIC RAM DESCRIPTION The TC514800AJL/AFTL is the new generation dynamic RAM organized 524,288 word by 8 bit. The TC514800AJL/AFTL utilizes Toshiba’s CMOS silicon gate process technology as well as advanced circuit

Contextual Info: • li 6 INTEGRATED CIRCUIT TO SH IB A TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT TC51V4400APL / AJ L / A SJ L / A Z L / AFTL / ATRL - 8 0 / 1 0 SILICON GATE CMOS TECH NICAL DATA TENTATIVE D A TA 1.048.576 W ORD x 4 BIT DYN AM IC RAM DESCRIPTION The TC51V4400APL/AJL/ASJL/AZL/AFTL/ATRL is the new generation dynamic RAM organized

Contextual Info: TOSHIBA THMY12N11A70,70L,75,75L,80,80L TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 16,777,216-WORD BY 64-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY12N11A is a 16,777,216-word by 64-bit synchronous dynamic RAM module consisting of eight TC59SM708AFT/AFTL DRAMs and an unbuffer on a printed circuit board.

PCI33

Contextual Info: THLY64N11A70,70L,75,75L,80,80L TOSHIBA TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 8,388,608-WORD BY 64-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THLY64N11A is a 8,388,608-word by 64-bit synchronous dynamic RAM module consisting of four TC59SM716AFT/AFTL DRAMs on a printed circuit board.

Contextual Info: TOSHIBA TC51V4400ASJL/AFTL80 1,048,576 WORD X 4 BIT DYNAMIC RAM DESCRIPTION The TC51V 4400ASJL/AFTL is the new generation dynam ic RAM organized 1,048,576 w ord by 4 bit. The TC51V 4400A SJL/AFTL utilizes T oshiba's CM OS silicon gate process technology as w ell as advanced

Contextual Info: PULSE MODULATED AND POWER GATED AMPLIFIERS AFSW/AFTL SERIES FEATURES PULSE MODULATED • Modulation rates up to 500 kHz PRF • Video leakage approximately 250 mV • Rise time . < 50 ns • Fall time . < 250 ns POWER GATED

rao 07-2

Contextual Info: TOSHIBA TH M Y64N 11A 70#70L,75f75L#80#80L TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 8,388,608-WORD BY 64-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY64N11A is a 8,388,608-word by 64-bit synchronous dynamic RAM module consisting of four TC59SM716AFT/AFTL DRAMs and an unbuffer on a printed circuit board.

Contextual Info: 1,048,576 WORD X 4 BIT DYNAMIC RAM DESCRIPTION The TC514400ASJL/AFTL/ATRL is the new generation dynam ic RA M organized 1,048,576 word by 4 bit. The TC514400ASJL/AFTL/ATRL utilizes T oshiba’s CM OS silicon gate process technology as w ell as

a114 est

Abstract: TC51V4400AF RSI05
Contextual Info: TOSHIBA TC51V440QASJI7AFILS0 1,048,576 WORD X 4 BIT DYNAMIC RAM DESCRIPTION The TC51V4400ASJL/AF1L is the new generation dynamic RAM organized 1,048,576 word by 4 bit. The TC51V4400ASJL/AFTL utilizes Toshiba’s CMOS silicon gate process technology as well as advanced

220E-2

Abstract: D2W220DD18 V220DD AMP110 lt 860 D2W120DD D2W120DG D2W220DD D2W220DF I5BI
Contextual Info: Mu f u ^ O jA r m s ^ [l](6 n [| ]^ (0 )V r m s m. A C JU — (CFU+AftlO mttkmm D2W120UD D2W120DF D2W120DG D2W220DD D2W220DF D2W220DG « D2W220DD1 8 D2W220DF1 8 D2W220DG18 U L S ìtè N O . (ff#fllÌP.30) : E69031 C S A : LR49089 T li V : R75169/R85136 MS.:(Iti) 65g

70l7

Contextual Info: TO SH IBA THMY12E11A70,70L,75,75L,80,80L TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 16,777,216-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY12E H A is a 16,777,216-word by 72-bit synchronous dynamic RAM module consisting of nine TC59SM708AFT/AFTL DRAMs and an unbuffer on a printed circuit board.

D018

Abstract: D019 D032 JEP-106
Contextual Info: T O S H IB A THMY25N01A70,70L,75,75L,80,80L TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 33,554,432-WORD BY 64-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY25N01A is a 33,554,432-word by 64-bit synchronous dynamic RAM module consisting of 16 TC59SM708AFT/AFTL DRAMs and an unbuffer on a printed circuit board.

M904

Abstract: 0BS00
Contextual Info: TC59SM916/08/04AFT/AFTL-70,-75,-80 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 8,388,608-WORDS x 4BANKS × 16-BITS SYNCHRONOUS DYNAMIC RAM 16,777,216-WORDS × 4BANKS × 8-BITS SYNCHRONOUS DYNAMIC RAM 33,554,432-WORDS × 4BANKS × 4-BITS SYNCHRONOUS DYNAMIC RAM

Contextual Info: 1,048,576 WORD X 4 BIT DYNAMIC RAM DESCRIPTION The TC514400ASJL/AFTL/ATRL is the new generation dynamic RAM organized 1,048,576 word by 4 bit. The TC514400ASJL/AFTL/ATRL utilizes Toshiba’s CMOS silicon gate process technology as well as

LH0032

Contextual Info: EL2006/EL2006A EL2006/EL2006A WISH PERFORMANCE AHAL06 WfTESRÄtED CIRCUITS ffifffl Gttltt FdSt F ET llipUt Op Aftlß F e a tu r e s G en era l D e sc r ip tio n • • • • • • • 90 dB open loop gain 450 W/fj .s slew rate 40 M H z b andw idth N o th erm al tail

Contextual Info: TOSHIBA THLY12N01 A70,70L,75,75L,80,80L TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 16,777,216-WORD BY 64-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THLY12N01A is a 16,777,216-word by 64-bit synchronous dynamic RAM module consisting of eight TC59SM716AFT/AFTL DRAMs on a printed circuit board.

C551001

Contextual Info: 120-312 H3 S - / J / 7 TOSHIBA 1Mbit Static RAM TC551001APL-L/AFL-L /AFTL-L/ATRL-L LV Data Sheet INTEGRATED CIRCUIT TOSHIBA TOSHIBA DIGITAL INTEGRATED CIRCUIT TECHNICAL DATA TC551001APL / AFL / AFTL / ATRL - 70L, - 85L, - 1 0L (LV) ” SILICON GATE CMOS

A9RV

Abstract: A9RC
Contextual Info: TOSHIBA TC514800AJLL/AFILLt70/80 524,288 WORD X 8 BIT DYNAMIC RAM DESCRIPTION The TC514800AJLL/AFTLL is the new generation dynamic RAM organized 524,288 word by 8 bit. The TC514800AJLL/AFTLL utilizes Toshiba’s CMOS silicon gate process technology as well as advanced circuit

D036

Abstract: D018 D019 D032 D051
Contextual Info: T O S H IB A THMY25E01A70,70L,75,75L,80,80L TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT TENTATIVE 33,554,432-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY25E01A is a 33,554,432-word by 72-bit synchronous dynamic RAM module consisting of 18 TC59SM708AFT/AFTL DRAMs and an unbuffer on a printed circuit board.

Contextual Info: PULSE MODULATED AND POWER GATED AMPLIFIERS AFSW/AFTL SERIES FEATURES PULSE MODULATED • Modulation rates up to 500 kHz PRF • Video leakage approximately 250 mV • Rise time . < 50 ns • Fall time . < 250 ns POWER GATED

Contextual Info: T H M Y 6 4 E 1 1A 7 0 #70L,75f75L#80#80L TOSHIBA TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 8,388,608-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY64E11A is a 8,388,608-word by 72-bit synchronous dynamic RAM module consisting of 5 TC59SM716AFT/AFTL DRAMs and an unbuffer on a printed circuit board.

Contextual Info: TOSHIBA T H M Y 6 4 N 1 1A 7 0 #70L,75f75L#8 0 #80L TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT TENTATIVE 8,388,608-WORD BY 64-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY64N11A is a 8,388,608-word by 64-bit synchronous dynamic RAM module consisting of four TC59SM716AFT/AFTL DRAMs and an unbuffer on a printed circuit board.

Contextual Info: ^ TTL CONTROLLED AMPLIFIERS AFTL SERIES FEATURES • TTL Switched Power Supply • Built-In TTL Driver • Ideal for: - Remote Power Control - Low Power Consumption - Thermal Management Systems • Standard AFS Low Noise Performance • Specifications: - Rise Time <2.0 ps

TC59SM716AFT

Abstract: TC59SM716
Contextual Info: TC59SM716/08/04AFT/AFTL-70,-75,-80 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 2,097,152-WORDS x 4 BANKS × 16-BITS SYNCHRONOUS DYNAMIC RAM 4,194,304-WORDS × 4 BANKS × 8-BITS SYNCHRONOUS DYNAMIC RAM 8,388,608-WORDS × 4 BANKS × 4-BITS SYNCHRONOUS DYNAMIC RAM