AM 22V10 Search Results

am186 programmer guide

Abstract: palce programmer schematic AM29F400 mcs131 MA6 rs232 driver pal16v8 NET186 PE68068T SQFP100 intel 186ES
Contextual Info: net186frt.fm Page 1 Monday, June 23, 1997 10:30 AM 1.0 Net186 Demonstration Board User’s Manual net186about.book : net186frt.fm Page 2 Monday, June 23, 1997 11:05 AM Net186TM Demonstration Board User’s Manual, Release 1.0 1.0 1997 by Advanced Micro Devices, Inc.

Contextual Info: PA7024 PEEL Am y •> GOULD AM I. Prelim inary Data Sheet ■>Sem iconductors PA7024 Features • Logic Integration and Customization of: — PLDs, SSI/MSI, random logic, decoders, encoders, muxes, comparators, shifters, counters, state machines, etc. • User-Configurable High Density Logic Array

pal22v10

Abstract: al22v10 AMPAL22V10 5962-86053013X
Contextual Info: Am PAL22V 10 24-Pin IMOX Programmable Array Logic PAL Distinctive Characteristics • Second-generation PAL device architecture • • • • Increased logic power — up to 22 inputs and 10 outputs Increased product terms — average 12 per output

lg r40 MOTHERBOARD CIRCUIT diagram

Abstract: palce programmer schematic lg tv electronic board schematic R5432 IHI-0001 PALCE mach210 programming EOI-0012 NBW4 VG-468 HP1650B
Contextual Info: hrg.book Page i Wednesday, July 22, 1998 9:18 AM ARM Development Board ARM7TDMI Version Document number: ARM DUI 0017C Issued: March 1997 Copyright ARM Limited 1997 ENGLAND GERMANY ARM 90 Fulbourn Road Cherry Hinton Cambridge CB1 4JN UK Telephone: +44 1223 400400

MC15

Abstract: XCR5128C VHDL
Contextual Info: xcr5128c.fm Page 1 Tuesday, August 8, 2000 7:44 AM APPLICATION NOTE XCR5128C: 128 Macrocell CPLD with Enhanced Clocking R DS042 v1.2 August 10, 2000 14* Product Specification Features Description • The XCR5128C CPLD (Complex Programmable Logic Device) is a member of the CoolRunner family of CPLDs

XCR3032C

Abstract: MC15 XCR5032C Xilinx jtag serial
Contextual Info: 3032c.fm Page 1 Tuesday, August 8, 2000 7:28 AM APPLICATION NOTE XCR3032C: 32 Macrocell CPLD with Enhanced Clocking  DS040 v1.2 August 10, 2000 14* Product Specification FEATURES Description • The XCR3032C CPLD (Complex Programmable Logic Device) is a member of the CoolRunner family of CPLDs

DS03

Abstract: Xilinx XCR3032 MC15 XCR3032A XCR5032C
Contextual Info: 3032a.fm Page 1 Tuesday, August 8, 2000 7:30 AM APPLICATION NOTE XCR3032A: 32 Macrocell CPLD with Enhanced Clocking R DS039 v1.2 August 10, 2000 14* Product Specification Features Description • The XCR3032A CPLD (Complex Programmable Logic Device) is a member of the CoolRunner family of CPLDs

Contextual Info: •> g o u l d AM I ' Sem iconductors CMOS Programmable Electrically Erasable Logic Device PEEL 22CV10 — V ariable p roduct term distribution 8 to 16 per output fo r g reater logic flexibility — Independently p rogram m able 12-configuration I/O m acrocells

Contextual Info: CY37064V PR EU M IN Am UltraLogic 3.3V 64-Macrocell ISR™CLPD — tPD = 8.5ns Features — ts = 5.0 ns • 64 macrocells in four logic blocks • 3.3V In-System Reprogrammable™ ISR™ — tco = 6.0 ns • • • • • • — JTAG-compliant on-board programming

gal22v10b

Contextual Info: GAL22V10B GAL22V10 Lattice High Performance E2CMOS PLD FU N C TIO N AL B LO C K DIAG R AM FEATURES >HIGH PERFORMANCE E^CMOS* TECHNOLOGY — 7.5 ns Maximum Propagation Delay — Fmax = 111 MHz — 5 ns Maximum from Clock Input to Data Output — TTL Compatible 16 mA Outputs

XCR5064

Abstract: MC15 PZ3064
Contextual Info: xcr5064.fm Page 1 Tuesday, August 8, 2000 7:50 AM APPLICATION NOTE  DS043 v1.2 August 10, 2000 XCR5064: 64 Macrocell CPLD 14* Features. • • • • • • • • • • • • • • • • • • • • • • Industry's first TotalCMOS PLD - both CMOS design

Contextual Info: COM’L: H-7/10/15/20 AM DÌI IND: H-10/15/20 PALCE26V12 Family V A N T I S 28-Pin EE CMOS Versatile PAL Device DISTINCTIVE CHARACTERISTICS • 28-pin versatile PAL programmable logic device architecture ■ Electrically erasable CMOS technology provides half power only 115 mA at high

a314j

Abstract: 297500 28F016XS 28F016XS-15 ORCAD
Contextual Info: E TECHNICAL PAPER Interfacing the 28F016XS to the i960 Microprocessor Family KEN MC KEE TECHNICAL MARKETING ENGINEER TIM KELLY ENGINEER RANNA PRAJAPATI ENGINEER November 1995 Order Number: 297500-003 11/28/95 10:26 AM 297500_3.DOC Information in this document is provided solely to enable use of Intel products. Intel assumes no liability whatsoever, including

4580d

Abstract: cmos ic 4584 smd 5962-8984104LX 10OUTPUT lpwr 1n 4584d 5962-89841 4588d AMD213 5962-89641
Contextual Info: in AM D REVISIONS DATE YR-MO-OA DESCRIPTION Added K package. Added 04 d e v ic e , two s u p p lie rs and 05 d e v ic e , one s u p p lie r . Added vendor CAGE 34335 fo r d evices O IL , 013, and 02L. E d it o r ia l changes throughout. Added APPROVED 91-04-19

Contextual Info: AT22LV10/L Features • Low Voltage Programmable Logic Device W ide Power Supply Range - 3.0V to 5.5V Ideal for Battery Powered Systems High Speed Operation 20 ns max Propagation Delay at Vcc = 3.0V Commercial and Industrial Temperature Ranges Familiar 22V10 Logic Architecture

Contextual Info: ATV750B Features • Advanced, High Speed Programmable Logic Device-Superset of 22V10 Improved Performance - 7.5 ns tPD, 95 MHz External Operation Enhanced Logic Flexibility Backward Compatible with ATV75Q/L Software and Hardware New Flip-Flop Features D- orT-Type

PALC22V10

Abstract: OH-25
Contextual Info: CMOS Program m able A rray Logic PALC22V1 OH-25 PALC22V1 OH-35 Features/B enefits D escription • CMOS technology cuts power in half 90 mA while matching bipolar 22V10 speed The PALC22V10 is an advanced PAL device built with lowpower CMOS technology. The device can be programmed to

LC 7258

Abstract: 24L02 PALC22V10
Contextual Info: CMOS Program m able Array Logic PALC22V1 OH-25 PALC22V1 OH-35 Features/B enefits D escription • CMOS technology cuts power in half 90 mA while matching bipolar 22V10 speed The PAI.C22V10 is an advanced PAL device built with lowpower CMOS technology. The device can be programmed to

features cypress flash 370

Abstract: cypress flash 370 device cypress flash 370
Contextual Info: Revision: Monday, January 4,1993 57E D • 550=1^2 □ D D tlQ21 573 ■ CYP 07 CY7C373 C VPRESS SEMICONDUCTOR PRELIMINARY 7M CYPRESS SEMICONDUCTOR 64-Macrocell Flash PLD perform ance o f the 22V10 to high-density PLD s. Features • 64 m acrocells in four logic blocks

AM 22V10

Abstract: 22V10 AMD 22V10 22V10-15 KLK Fuses PALC22V10 PEEL22CV eeprom programmer schematic design K/VHC86G
Contextual Info: Philips Semiconductors Military Programmable Logic Devices_ CMOS programmable electrically erasable 22V10-15 logic d e v i c e _ _ PIN CO NFIGU RATIO N D ESCRIPTIO N FEATURES • Advanced CMOS EEPROM technology

Contextual Info: fax id: 6137 CY7C372Î C'i- UltraLogic 64-Macrocell Flash CPLD Features FLASH370i™ family of high-density, high-speed CPLDs. Like all members of the Fi_ASH370i family, the CY7C372i is de­ signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to

AMPAL22V10

Contextual Info: A m P A L 2 2 V 1 0-1 5 24-Pin IM O X III7“ Program m able Array Logic P R E L IM IN A R Y Distinctive Characteristics • • • • • • • • • 15-ns perform ance Increased logic pow er — up to 22 inputs and 10 outputs Increased product term s — average 12 per output

Contextual Info: Features Advanced, High-speed, Electrically-erasable Programmable Logic Device - Superset of 22V10 - Enhanced Logic Flexibility - Backward Compatible with ATV750B/BL and ATV750/L Software and Hardware Low Power— Edge-sensing “L” Option with 1 mA Standby Current

Contextual Info: UltraLogic 128-Macrocell Flash CPLD is designed to bring th e ease o f use and high perform ance o f th e 22V10 to highdensity CPLDs. Features • 128 macrocells in eight logic blocks • 64 I/O pins T he 128 m acrocells in th e CY7C374 are di­ vided betw een eight logic blocks. Each