AM29C332 Search Results

TC001107

Abstract: Modified Booth Multipliers DB21 OA10 OA21 block diagram 8 bit booth multiplier am29c332
Contextual Info: Am29C332 CMOS 32-Bit Arithmetic Logic Unit ADVANCE INFORMATION Supports All Data Types It supports one-, two-, three- and four-byte data for all operations and variable-length fields for logical operations. Multiply and Divide Support Built-in hardware to support tw o-bit-at-a-tim e m odi­

AM29C10

Contextual Info: Am29C332 CM O S 32-Bit Arithmetic Logic Unit ADVANCE INFO R M ATIO N Single Chip, 32-B it ALU Standard product supports 110 ns microcycle time for th e 32-bit data path. It is a com binatorial ALU with equal cycle tim e for all instructions. Speed S elect supports 80-ns system cycle tim e

Wiring Diagram ford s max

Abstract: Wiring Diagram ford c max Am29C332 am29c334 modified booth circuit diagram K1599 am29338 D622 D820 DA11
Contextual Info: Am29C332 CMOS 32-Bit Arithmetic Logic Unit ADVANCE INFORMATION • • • Single Chip, 32-Bit ALU Standard product supports 110 ns microcycle time for the 32-bit data path. It is a combinatorial ALU with equal cycle time for all instructions. Speed Select supports 80-ns system cycle time

AM29C33

Abstract: J-16
Contextual Info: Am 29C327 Double-Precision Floating-Point Processor FINAL DISTINCTIVE CHARACTERISTICS • • • • • H ig h -p e rfo rm a n ce d o u b le -p re c is io n flo a tin g -p o in t processor Comprehensive floating-point and integer instruction sets Single VLSI device performs single-, double-, and

k0312

Abstract: yb06 YB04 YA16 apl 117 yb07 y802 AWa3 74N10 V18-Y3S
Contextual Info: Am29C334 CMOS Four-Port Dual-Access Register File PRELIMINARY • 64 x 18 Bit W ide R egister File The Am29C334 is a 64 x 18-bit, dual-access RAM with tw o read ports and two write ports. Pipelined Data Path The Am 29C334 can be configured to support either a

am29325

Abstract: H-14 AM29325GC WF023740 ScansUX970 TB000640
Contextual Info: Am29325 32-Bit Floating-Point Processor • Single VLSI device performs high-speed floating-point arithmetic - Floating-point addition, subtraction, and multiplication in a single clock cycle - Internal architecture supports sum-of-products, Newton-Raphson division

29C325

Contextual Info: Am29C325 CMOS 32-B¡t Floating-Point Processor FINAL DISTINCTIVE CHARACTERISTICS • • Single VLSI device performs high-speed single­ precision floating-point arithmetic Floating-point addition, subtraction, and multiplication in a single clock cycle Internal architecture supports sum-of-products,

YB17

Abstract: A09 N03 yb04 b09 n03 GE H11 A10 K/1/64W am29c332
Contextual Info: Am29C334 CMOS Four-Port Dual-Access Register File PRELIMINARY 64 x 18 Bit W ide R egister File The Am 29C334 is a 64 x 18-bit, dual-access RAM with tw o read ports and two write ports. Pipelined D ata Path The Am 29C 334 can be configured to support either a

Contextual Info: Am29338 32-Bit Byte Queue ADVANCE INFO R M ATIO N A synchronous and Synchronous O peration - S upports com m unication between system s w ith differ­ e nt clocks and different bus w idths Retransm it - Data can be read out repeatedly Horizontal Cascading

lzl 24h

Abstract: pioneer PAL 007 A CNC DRIVES ford EEC V pioneer PEG 468 AM27S43 AM29300 am29325 Am29434 YA11
Contextual Info: a 32-Bit Microprosrammable Products Am29C300/29300 1 9 8 8 D ata B o o k Advanced Micro D e v ic e s a Advanced Micro Devices Am29C300/29300 Data Book 1988 Advanced Micro Devices Advanced Micro Devices reserves the right to make changes in its products without

AM29331

Abstract: Am29300 ScansUX970 AM29331GC
Contextual Info: Am29331 16-Bit Microprogram Sequencer DISTINCTIVE CHARACTERISTICS 16-Bits Address up to 64K Words Supports 80-90 ns microcycle time for a 32-bit highperformance system when used with the other members of the Am29300 Family. Real-Time Interrupt Support Micro-trap and interrupts are handled transparently

AM29C323

Abstract: AM29C323GC A7 p25 T14X3 CGX169 Y0-Y31 32x32 Multiplier 65A15 PW1232 32-bit adder
Contextual Info: Am29C323 CMOS 32-Bit Parallel Multiplier PRELIMINARY • • • • • 32-Bit Three-Bus Architecture - The device has tw o 32-bit input ports and one 32-bit output port with clocked multiply time of 100 ns Speed Selects - 80- and 55-ns speed-select parts

Am29325

Abstract: H-14
Contextual Info: A m 29C 325 CMOS 32-Bit Floating-Point Processor FINAL DISTINCTIVE CHARACTERISTICS • • Single VLSI device performs high-speed single­ precision floating-point arithmetic Floating-point addition, subtraction, and multiplication in a single clock cycle

Am29337

Contextual Info: Am29337 16-Bit Bounds Checker Double Comparator Out-of-Bounds Flag - C om pares a 16-bit input num ber with a low er lim it and an upper limit - Flags values th a t are outside the bounds of a lower and an upper limit Cascadable Compares Signed or Unsigned Numbers

Contextual Info: Am2910A £1 Microprogram Controller > 3 DISTINCTIVE CHARACTERISTICS to <0 Twelve Bits Wide Addresses up to 4096 words of microcode with one chip. All internal elements are a full 12 bits wide. Internal Loop Counter Pre-settable 12-bit down-counter for repeating instruc­

PD102

Abstract: ncl 039 Am29C325 Am29325 AM29C33 pin diagram of amd am2 processor th02 H-14 AM27S43 Am29CPL14
Contextual Info: A m 29C 325 CMOS 32-Bit Floating-Point Processor FINAL DISTINCTIVE CHARACTERISTICS • • Single VLSI device performs high-speed single­ precision floating-point arithmetic Floating-point addition, subtraction, and multiplication in a single clock cycle

H-14

Abstract: L-13 WF023740 ScansUX971 Am29C325
Contextual Info: Am29C325 CMOS 32-Bit Floating-Point Processor ADVANCE INFORMATION DISTINCTIVE CHARACTERISTICS • • Single VLSI device performs high-speed floating-point arithmetic - Floating-point addition, subtraction, and multiplication in a single clock cycle - Internal architecture supports sum-of-products,

J-16

Abstract: S0-S31 S2126 ScansUX971 m17f
Contextual Info: Am29C327 CMOS Double-Precision Floating-Point Processor ADVANCE INFORMATION Exact IEEE compliance for denormalized numbers with no speed penalty Eight-deep register file for intermediate results and onchip 64-bit data path facilitates compound operations;

b09 n03

Abstract: A09 N03 YA11 D803 yb05 L0722 L0623 k0312 apl 117 YA16
Contextual Info: Am29C334 CMOS Four-Port Dual-Access Register File PRELIMINARY 64 x 18 Bit Wide Register File The Am29C334 is a 64 x 18-bit, dual-access RAM with two read ports and two write ports. Pipelined Data Path The Am29C334 can be configured to support either a non-pipelined data path similar to the Am29334 or a

J-16

Abstract: 1f s27
Contextual Info: Am 29C327 Double-Precision Floating-Point Processor FINAL DISTIN CTIVE CH ARA CTERISTICS • • • • • H ig h -p e rfo rm a n ce d o u b le -p re c is io n flo a tin g -p o in t processor Comprehensive floating-point and integer instruction sets Single VLSI device performs single-, double-, and

Contextual Info: NOV 2 i « # 1 Am29C325 CMOS 32-Bit Floating-Point Processor > 3 DISTINCTIVE CHARACTERISTICS Single VLSI device performs high-speed single­ precision floating-point arithmetic Floating-point addition, subtraction, and multiplication in a single clock cycle

PT 10000

Contextual Info: Am29C327 CMOS Double-Precision Floating-Point Processor ADVANCE INFORMATION Exact IEEE compliance for denormalized numbers with no speed penalty Eight-deep register file for intermediate results and onchip 64-bit data path facilitates compound operations;

Am29C323

Abstract: 07B30 Am29C323-2 AM29C516
Contextual Info: Am29C323 CMOS 32-Bit Parallel Multiplier PRELIMINARY Registers can be m ade transparent - Input and output registers can be made transparent independently to elim inate unwanted pipeline delay Supports T w o ’s Com plem ent, Unsigned or Mixed Num bers D ata Integrity Through M aster-Slave M ode and Pari­

DFa 809

Abstract: se 617
Contextual Info: 1 1991 Am29C516A/Am29C517 A 16 x 16-Bit CMOS Parallel Multipliers DISTINCTIVE CHARACTERISTICS Output register may be made transparent Am29C516A pin and functionally com patible with CY7C516, WTL1516, IDT7216, MPY016, and Am29516 TTL I/O and single + 5 V supply