AN15 DE HEN VD Search Results

pmi op270

Abstract: op270gs OP271 PMI op270gp
Contextual Info: OP-270 PMÎ DUAL VERY LOW-NOISE PRECISION OPERATIONAL AMPLIFIER >n M o n o l i t h ir*. I m FEATURES 5 n V /v Hz at 1kHz Max, o ffe rin g co m p a ra b le pe rform ance to P M I’s in d u s try standard OP-27. Very Low N o is e . 5 n V /v Hz @ 1kHz Max

Contextual Info: High Speed, Low Noise Quad Operational Amplifier ANALOG DEVICES OP-471 FEATURES • • • • • • • • • The OP-471 has an in pu t o ffset voltage under 0.8mV and an in pu t o ffset voltage d rift below 4/j V/°C , guaranteed over the fu ll m ilita ry tem perature range. Open loop gain of the OP-471

Contextual Info: FLEX 10K Embedded Programmable Logic Family January 1998. ver. 3 Features. Data Sheet The industry's first em bedded program m able logic device PLD family, providing system integration in a single device Em bedded array for im plem enting megafunctions, such as

Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT jU P D 1 7 8 0 0 2 , 1 7 8 0 0 3 8-BIT SINGLE-CHIP MICROCONTROLLERS The ¿¡PD178002 and 178003 are 8-bit single-chip CMOS m icrocontrollers that incorporate hardware for digital tuning system s. The CPU uses the 78K/0 architecture, w hich makes it easy to im plem ent high-speed access to internal mem ory

Contextual Info: DATA SHEET \ | P f " / M O S IN T E G R A T E D C IR C U IT ;î P D 1 7 3 0 0 4 A , 1 7 8 0 0 6 A , 1 7 8 0 1 6 A , 1 7 8 0 1 8 A 8-BIT SINGLE-CHIP MICROCONTROLLERS The ¿¡PD178004A, 178006A, 178016A and 178018A are 8-bit single-chip CMOS m icrocontrollers that incorporate

MATSUA FJS

Abstract: 02VOD FX101
Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUIT //PD78064B 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION T h e /¿PD 78064B is a p roduct in th e fiP D 7 8 0 6 4 B S u bseries w ith in th e 7BK/0 S eries. T h e E le ctro M a g n e tic Interfere nce E M I noise gen e ra te d in s id e th e ¿1PD78064B is reduced c o m p a re d to the

Contextual Info: Prelimina: SIARCTechnology STP1090A Business January Multi-Cache Controller ,TM DATA. SE ET Integrated Cache Controller for SuperSPARC D e s c r ip t io n The STP1090A is a high-perform ance external cache controller for the STP1020A SuperSPARC and STP1021 (SuperSPARC-II) microprocessors. It is used w hen a large secondary cache or an interface

Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT /¿PD78P058 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION The ¿¿PD78P058 is a member ofthe/iPD78054 subseries of 78K/0 series products, in which the on-chip mask ROM is replaced with one-time programmable OTP ROM or EPROM.

eaxxxxx

Contextual Info: TMS320C40 DIGITAL SIGNAL PROCESSOR I SPRS038 - JANUARY 1996 Highest Performance Floating-Point Digital Signal Processor DSP - ’320C40-60: 33-ns Instruction Cycle Time, 330 MOPS, 60 MFLOPS, 30 MIPS, 384M B ytes/s - ’320C40-50: 40-ns Instruction Cycle Time

a20202

Abstract: 25p28 84 PIN CERAMIC QUAD FLAT PACK TEXAS INSTRUMENTS LA7292 325-pin 436-Pin ld25 cv ot 112 S20C40 ansi y32
Contextual Info: SMJ320C40 DIGITAL SIGNAL PROCESSOR SGUS017 - OCTOBER 1993 -55°C to 125°C Operating Temperature Range; Class B Processing Highest Performance Floating-Point DSP - 50-ns Instruction Cycle Time: 220 MOPS, 40 MFLOPS, 20 MIPS, 256 Mbytes/s - 60-ns Instruction Cycle Time:

tms 3896

Abstract: qml-38535 LDO, ld12 SMD MARKING CODE L33 Marking LD25 CP11N 25p28 smd hk-1 La2 D22 LA7195
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED A Chanqes in accordance with NOR 5962-R124-95. 95-04-28 Monica L. Poelkinq B Chanqes in accordance with NOR 5962-R003-96. 95-10-13 Monica L. Poelkinq C Add device type 03. Update boiler plate, editorial chanqes throuqhout.

Contextual Info: SMJ320C40, TMP320C40 DIGITAL SIGNAL PROCESSORS SGUS017E - OCTOBER 1993 - REVISED SEPTEMBER 1999 * • SMJ: QML Processing to MIL-PRF-38535 SM: Standard Processing • I • • • TMP: Commercial Level Processing TAB Operating Temperature Ranges: - Military M -5 5 °C to 125°C

SuperSPARC

Abstract: STP1020 mbus sparc IEEE754 STP1021A instruction set Sun SPARC T4 instruction set Sun SPARC T6
Contextual Info: ST P 1021A S un M icro electro nics J u ly 1997 SuperSPARC -ll DATA SHEET SPARC v8 32-Bit Superscalar Microprocessor D e s c r ip t io n T h e ST P 1021A is a n e w m em b er o f the SuperSP A R C -II fam ily o f m icro p ro cesso r prod u cts. L ik e its p red eces­

TI 35X35 BGA 368 BGA

Abstract: EPF20K
Contextual Info: APEX 20K Programmable Logic Device Family November 1999. ver. 2.05 FeatU r6S D atasheet P re lim in a r y In fo rm a tio n • Industry's first program m able logic device PLD incorporating System -on-a-Program m able-Chip integration M ultiCore™ architecture integrating look-up table (LUT) logic,

RJP 3045

Abstract: Transistor z3p NP02 P104t str 1195 P022J I-CUBE iq P116C RP011 7805 v5
Contextual Info: M Ä ' I- C IQ Family Data Sheet u b e Features Description • Eight d evices ran gin g from 32 to 320 I / O Ports The IQ d evices are designed for use in sw itching and interconnect applications. In sw itching applications, these d evices are used to d ynam ically sw itch one or m ore signals. W hen

Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT /XPD78070A 8-BIT SINGLE-CHIP M ICRO CO N TRO LLER DESCRIPTION The juPD78070A is a limited-function product from which the internal ROM of the/iPD 78078 subseries has been removed. Through interchangeable external ROM, program maintenance can be performed easily. B e sid e s a high-speed, highperform ance C P U , this m icrocontroller h as an internal RAM , I/O ports, 8-bit resolution A/D converter, 8-bit resolution

Contextual Info: N EC ELECTRONICS INC b?E D NEC NEC Electronics Inc. • t.427SSS ODg'ÎO'iM TOS ■ NECE VR4400SC fjPD30411 64-Bit RISC Microprocessor: Primary/Secondary Cache Memory Preliminary Information Description The VR4400SC is a 64-bit RISC m icroprocessor w ith

Contextual Info: Preliminary Information AMD-K6 Processor Data Sheet AMDZl Preliminary Information 1998 Advanced Micro Devices, Inc. A ll rights reserved. A dvanced M icro D evices, Inc. “AMD” reserves th e rig h t to m ake changes in its p ro d u cts w ith o u t n otice in o rder to im prove design or perform ance characteristics.

0257S2

Contextual Info: AMD-K6-III Processor Data Sheet AMD Z\ D i 02575E5 QDLBE72 41fl B 1999 Advanced Micro Devices, Inc. A ll rig h ts reserv ed . The contents of this docum ent are provided in connection w ith A dvanced Micro D evices, Inc. "AMD" products. AMD m akes no representations or w arranties w ith

Contextual Info: AMD£I AMD-K6 -III Processor Data Sheet AMDH P R O C E S S O R 3 0 IVO W l. VI '• ! ;- Î Preliminary Information AMD-K6-III Processor Data Sheet AMDZI 1999 Advanced Micro Devices, Inc. AU rights reserved. The contents of this docum ent are provided in connection w ith A dvanced Micro

Contextual Info: Preliminary Information AMD-K6-2 Processor Data Sheet AMDZI Preliminary Information 1998 Advanced Micro Devices, Inc. All rights reserved Advanced Micro Devices, Inc. “AMD” reserves th e right to m ake changes in its products w ithout notice in order to improve design or perform ance characteristics.

Contextual Info: 1: 34 AM TUPP 2488 ASSP Telecom Standard Product Data Sheet Released sd ay ,2 2D ec em TUPP™ 2488 be r, 20 04 12 :3 PM5364 Data Sheet Released Issue No. 7: August 2004 Do wn l oa de d by C on te n tT ea m of Pa rtm in er In co n W ed ne SONET/SDH Tributary Unit Payload

Contextual Info: 2: 59 AM TUPP 2488 ASSP Telecom Standard Product Data Sheet Released ay ,1 8N ov em TUPP™ 2488 be r, 20 04 03 :5 PM5364 Data Sheet Released Issue No. 7: August 2004 Do wn l oa de d by C on te n tT ea m of Pa r tm in er In co n Th ur sd SONET/SDH Tributary Unit Payload

AC+121+V+TPI+121

Contextual Info: 2: 43 AM TUPP 2488 ASSP Telecom Standard Product Data Sheet Released ay ,1 8N ov em TUPP™ 2488 be r, 20 04 03 :5 PM5364 Data Sheet Released Issue No. 7: August 2004 Do wn l oa de d by C on te n tT ea m of Pa r tm in er In co n Th ur sd SONET/SDH Tributary Unit Payload