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    FIBOX DSP-ARCA-RM

    Door stopper set for mid ARCA, r
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey DSP-ARCA-RM Ammo Pack 1
    • 1 $65.8
    • 10 $65.8
    • 100 $51.3232
    • 1000 $51.3232
    • 10000 $51.3232
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    FIBOX DSP-ARCA-LM

    Door stopper set for mid ARCA, l
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey DSP-ARCA-LM Ammo Pack 1
    • 1 $65.8
    • 10 $65.8
    • 100 $51.3232
    • 1000 $51.3232
    • 10000 $51.3232
    Buy Now

    FIBOX DSP-ARCA-HLS

    Horizontal door stopper set, lef
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey DSP-ARCA-HLS Ammo Pack 1
    • 1 $56.83
    • 10 $56.83
    • 100 $44.3292
    • 1000 $44.3292
    • 10000 $44.3292
    Buy Now

    FIBOX DSP-ARCA-VRS

    Vertical door stopper set, right
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey DSP-ARCA-VRS Ammo Pack 1
    • 1 $56.83
    • 10 $56.83
    • 100 $44.3292
    • 1000 $44.3292
    • 10000 $44.3292
    Buy Now

    FIBOX DSP-ARCA-VLS

    Vertical door stopper set, left,
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey DSP-ARCA-VLS Ammo Pack 1
    • 1 $56.83
    • 10 $56.83
    • 100 $44.3292
    • 1000 $44.3292
    • 10000 $44.3292
    Buy Now

    SPARC Datasheets (7)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SPARC Atmel Rad-Hard 32-bit SPARC Embedded Processor Original PDF
    SPARC Atmel Rad-Hard 32-bit SPARC Embedded Processor Original PDF
    SPARC Atmel SPARC version 7 Instruction Set Original PDF
    SPARC 7 Atmel Instruction Set Original PDF
    SPARC RT Atmel SPARC Radiation Tolerant Processor Chip Set (CCA) Design Considerations List Original PDF
    SPARC V7.0 Atmel Instruction Set Original PDF
    SPARC-V7R Maxwell Technologies SINGLE BOARD COMPUTER Original PDF

    SPARC Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    CQFP352

    Abstract: QFP352 MCGA349 MCGA-349 adc controller vhdl code atmel 268 AT7913 CQFP352 package vhdl code 64 bit FPU SPARC v8 architecture BLOCK DIAGRAM
    Text: ATMEL AT7913E SpaceWire Remote Terminal Controller RTC DATASHEET Features • LEON2-FT Sparc V8 Processor • • • • • • • • • • • 5 stage pipeline 4K instruction caches / 4K data caches Meiko FPU Interrupt Controller Uart serial links


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    PDF AT7913E 32-bit 8bit/16bit 200Mbit/s CQFP352 QFP352 MCGA349 MCGA-349 adc controller vhdl code atmel 268 AT7913 CQFP352 package vhdl code 64 bit FPU SPARC v8 architecture BLOCK DIAGRAM

    SPARC64

    Abstract: SPARC64TM
    Text: PRIMEPOWER is the brand that brings together the world’s fastest bus technology and the latest in SPARC processor development to provide the best in value for money and system scalability in a Solaris operating environment TM PRIMEPOWER 800 This reliable mid-range server with up to 16 processors provides excellent availability for the largest


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    PDF SPARC64 800mm 570kg 16CPU BK0083-3M SPARC64TM

    UltraSPARC-IIIi

    Abstract: NVRAM for Sun UltraSparc IIi UltraSPARC-III STP2003QFP 4900 H02 gigabyte MOTHERBOARD CIRCUIT diagram A27 639 SME2411 SME1430LGA-360 SME1430LGA-440
    Text: SME1430LGA-360 SME1430LGA-440 SME1430LGA-480 May 1999 SPARC -IIi CPU DATA SHEET Highly Integrated 64-Bit RISC; L2-Cache, DRAM, PCI Interfaces DESCRIPTION The SME1430LGA CPU SPARC-IIi microprocessor is a highly-integrated, 64-bit, SPARC V9 superscalar


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    PDF SME1430LGA-360 SME1430LGA-440 SME1430LGA-480 64-Bit SME1430LGA 64-bit, SME1040 SME2411) UltraSPARC-IIIi NVRAM for Sun UltraSparc IIi UltraSPARC-III STP2003QFP 4900 H02 gigabyte MOTHERBOARD CIRCUIT diagram A27 639 SME2411 SME1430LGA-360 SME1430LGA-440

    SPARC v8 architecture BLOCK DIAGRAM

    Abstract: 352-CQFP
    Text: Standard Products UT699 32-bit Fault-Tolerant SPARCTM V8/LEON 3FT Processor Data Sheet June 25, 2012 INTRODUCTION FEATURES  Implemented on a 0.25mCMOS technology  Flexible static design allows up to 66MHz clock rate  89 DMIPS throughput via 66MHz base clock frequency


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    PDF UT699 32-bit 25mCMOS 66MHz IEEE-754 SPARC v8 architecture BLOCK DIAGRAM 352-CQFP

    smd 3Ft 82

    Abstract: smd 3ft thermal specifications UT699 UT699
    Text: Standard Products UT699 32-bit Fault-Tolerant SPARCTM V8/LEON 3FT Processor Preliminary Data Sheet November 3, 2008 INTRODUCTION The UT699 is a pipelined monolithic, high-performance, faulttolerant SPARCTM V8/LEON 3FT Processor. The UT699 provides a 32-bit master/target PCI interface, including a 16 bit


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    PDF UT699 32-bit 75MHz IEEE-754 10T/100 -40oC 105oC smd 3Ft 82 smd 3ft thermal specifications UT699

    vhdl code for 16 BIT BINARY DIVIDER

    Abstract: vhdl code 64 bit FPU AT697E
    Text: Atmel AT697E Rad-Hard 32-bit SPARC v8 Processor ERRATA SHEET Active Errata List 1. Multiplier/Divider Failure on Negative Operands Treatments 2. Call Return Address Failure with Large Displacement 3. Byte and Half-word Write to SRAM Failure when Executing from SDRAM


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    PDF AT697E 32-bit 512MB vhdl code for 16 BIT BINARY DIVIDER vhdl code 64 bit FPU AT697E

    asi bus

    Abstract: MB86831 MB86930
    Text: MB86831 MB86831 PROCESSOR Features 32-bit RISC processing for embedded applications The MB86831 is a member of the SPARClite Series of RISC processors which offers high performance and high integration for a wide range of embedded applications. The processor is based on the SPARC architecture and is upward


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    PDF MB86831 MB86831 32-bit asi bus MB86930

    MB86860

    Abstract: 0x80000410 bit3113 SCSN1 sparclite hypersparc BIT3115 S200 SS200 SAD-100
    Text: MB86860 SPARClite SPARClite MB86860 Series Data Sheet Rev.1.2 July 27, 1999 Fujitsu This material is preliminary and is subject to change without notice.  SPARC is a registered trademark of SPARC International, Inc. in the United States and is based on technology developed by Sun


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    PDF MB86860 32-bit 600us 0x80000410 bit3113 SCSN1 sparclite hypersparc BIT3115 S200 SS200 SAD-100

    0x00000000-0x00007FF

    Abstract: mb86833 MB86930 0x00000148 sparclite asi bus DRAM controller MB86832
    Text: SPARClite 830 Series Embedded Processor User’s Manual MB86833 OCTOBER 1997, Edition 1.0 FUJITSUMICROELECTRONICS, INC. CONTENTS Chapter 1: Overview of MB86833 1.1 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1


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    PDF MB86833 MB86833 EC-UM-20597-10/97 0x00000000-0x00007FF MB86930 0x00000148 sparclite asi bus DRAM controller MB86832

    0x000001D8

    Abstract: sparclite fujitsu dot matrix printer circuit diagram monitor e74 0x00000128 MB86930 IS 208 MXM pin assignment E5214 e328
    Text: SPARClite 930 Series Embedded Processor User’s Manual MB86936 Addendum JULY 1996, Edition 1.3 FUJITSUMICROELECTRONICS, INC. SPARClite User’s Manual – MB86936 Addendum Overview of the MB86936 1 Caches 2 Bus Interface Unit 3 DRAM Controller 4 DMA Controller


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    PDF MB86936 MB86936 E14-11 0x000001D8 sparclite fujitsu dot matrix printer circuit diagram monitor e74 0x00000128 MB86930 IS 208 MXM pin assignment E5214 e328

    sparclite

    Abstract: MB86930 SPARC 7 ASR16 ASR17 0x0000FF0C ASR311
    Text: SECTION 1 MB86930 Chapter 1: Overview Chapter 2: Programmer’s Model MB86930 - SPARClite User’s Manual CONTENTS SECTION 1 Chapter 1: Section 1: MB86930 Chapter 1: Overview 1.1 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1


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    PDF MB86930 MB86930 sparclite SPARC 7 ASR16 ASR17 0x0000FF0C ASR311

    ieee floating point alu in vhdl

    Abstract: ERC32 ieee floating point vhdl ieee floating point multiplier vhdl SPARC RT TSC691E TSC692E TSC693E RAM SEU ieee 32 bit floating point multiplier
    Text: SPARC Processor for SPACE Applications TEMIC Semiconductors is offering a SPARC RT Radiation Tolerant processor, based on SPARC V7 architecture, for space applications, consisting of three devices: integer unit (IU), the TSC691E, floating point unit (FPU), the TSC692E,


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    PDF TSC691E, TSC692E, TSC693E. ERC32, ieee floating point alu in vhdl ERC32 ieee floating point vhdl ieee floating point multiplier vhdl SPARC RT TSC691E TSC692E TSC693E RAM SEU ieee 32 bit floating point multiplier

    LSISAS2008

    Abstract: LSISAS2004 LSISAS2108 Fusion-MPT Message Passing Interface MPI specification Fusion-MPT Message Passing Interface Specification LSISAS SAS2008 DG072A9BB7 LSI sas2008 lsisas2008 datasheet
    Text: SAS2 Integrated RAID Solution User Guide Version 1.0 July 2009 Revision History Version and Date Version 1.0, July 2009 Description of Changes Initial release of this document. LSI, the LSI logo, Fusion-MPT, Integrated RAID, Integrated Mirroring, and Integrated Striping are trademarks or registered trademarks of LSI Corporation or its subsidiaries. SPARC is a registered trademark of SPARC International, Inc. Linux is a registered trademark of Linus Torvalds. Windows and MS-DOS are registered trademarks of Microsoft Corporation. All other brand and product names may


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    W48C60

    Abstract: J0801 w48c60-422 J0901 MC100LVEL39 MC12430 SME5410MCZ-270 587-pin TMS 3450 TMS 3450 specifications
    Text: SME5410MCZ-270 July 1998 SPARC -IIi CPU Module DATA SHEET 270 MHz CPU, 256 Kbyte E-cache, UPA, 66 MHz PCI DESCRIPTION The SPARC™-IIi CPU module SME5410MCZ-270 is a high performance, SPARC V9-compliant, small form-factor CPU module. It interfaces to the SPARC Port Architecture 64S (UPA64S) interconnect bus,


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    PDF SME5410MCZ-270 SME5410MCZ-270) UPA64S) UPA64S W48C60 J0801 w48c60-422 J0901 MC100LVEL39 MC12430 SME5410MCZ-270 587-pin TMS 3450 TMS 3450 specifications

    STP5111

    Abstract: No abstract text available
    Text: S un M ic r o e l e c t r o n ic s July 1997 SPARC -! CPU Module DATA SHEET 200 MHz SPARC-1 + 1 MB E-Cache + UDBs D e s c r ip t io n The SPARC-1 module is a high performance, SPARC V9 compliant, small form factor processor module, which interfaces to the SPARC Port Architecture UPA interconnect bus.


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    PDF 32kx36 64kxl8 MC10ELV111 5111AUPA-200 STP1030A) STP5111

    STP2012

    Abstract: SuperSPARC STP2016QFP
    Text: STP2016 S un M ic r o e l e c t r o n ic s J u ly 1997 Clock-2 Generator DATA SHEET System Clock Generator D e s c r ip t io n The STP2016 Clock-2 Chip generates clock signals for components on the SBus and MBus. The MBus and SBus are used by SPARC processors, such as SPARC™. The MBus is designed for multiprocessing MP , operating at


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    PDF STP2016 STP2016 64-bit 100-Pin STP2016Q STP2012 SuperSPARC STP2016QFP

    FPL256

    Abstract: No abstract text available
    Text: Tem ic S e m i c o n d u c t o r s Radiation-Tolerant 32-bit SPARC Processor PM Number ; TSC691E P o ta g e M Q FPL256 Function &#PeÉMres 32 -b it R IS C in teg er unit • • • • TSC692E M QFPL160 F lo a tin g -p o in t unit • • • • • R ed u c e d intro d u ctio n set c o m p u te r R IS C architecture c o m p a tib le w ith


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    PDF 32-bit TSC691E FPL256 FPL256

    in138

    Abstract: SPARC v9 architecture BLOCK DIAGRAM cpu lga UltraSPARC ii
    Text: S un M icro electro nics July 1997 SPARC -!! CPU Module DATA SHEET Complete 296 MHz CPU, 2.0 MB E-Cache, UDB-II D e s c r ip t io n The SPARC-II module is a high performance, SPARC V9 compliant, small form factor processor module. It interfaces to the SPARC Port Architecture UPA interconnect bus.


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    PDF MC100LVE210 STP5212UPA-300 296MHz 100MHz STP1031) STP1081) in138 SPARC v9 architecture BLOCK DIAGRAM cpu lga UltraSPARC ii

    supersparc

    Abstract: No abstract text available
    Text: Preliminary STP5010A SPARC Technology Business November 1994 5 0 MHz SPARC MBus Module DATA SHEET SPARC Only MBus Module D e s c r i p t io n The STP5010A is one of the members of the SPARC based MBus module products. The STP5010A is designed with the latest high performance superscalar SPARC STP1020A micro­


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    PDF STP5010A STP5010A STP1020A) Module-50 STP5010AMBUS-50 STP1020A supersparc

    Cy7C601

    Abstract: No abstract text available
    Text: CYPRESS SEM IC ON D U CT O R lOE D I asalta Docmso o T - PRODUCT DESCRIPTION CYPRESS SEMICONDUCTOR RISC Floating-Point Processor Features • Provides high performance 64-hit floating-point arithmetic for CY7C601 RISC integer unit • Provides SPARC compatible


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    PDF CY7C609 64-bit CY7C601 CY7C609 7C609-33 7C609-25

    Untitled

    Abstract: No abstract text available
    Text: C h a pt er E10 Floating-Point Unit E10.1 Overview of the MB86936 Floating-Point Unit The MB86936 FPU fully conforms to the A N SI/IEEE Standard 754-1985, the SPARC Architecture Version 8 specification, and he SPARC IEEE754 Implementation Recommendation except for the Nonstandard FP (NS=1 mode implementation.


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    PDF MB86936 IEEE754

    Untitled

    Abstract: No abstract text available
    Text: MB86833 SPARCIite SERIES 32-BIT RISC EMBEDDED PROCESSOR FUJITSU DATASHEET MARCH 1998 FEATURES Programmable address decoder and wait-state genera­ tor Single vector trapping • 66 M Hz CPU with on-chip clock multiplier 0.35 micron gate, 2-level metal CMOS technology,


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    PDF MB86833 32-BIT B86833 MB8683X FPT-144P-M08) 144-LEAD

    Untitled

    Abstract: No abstract text available
    Text: ASSP CMOS SPARCIite Series 32-Bit RISC Embedded Processor MB86833 Package • 144-pin, Plastic LQFP • FPT-144-M 08 Features 66 MHz CPU w ith on-chip clock m ultiplier Bus interface support for 8-, 16-, or 32-bit wide memory SPARC high performance RISC architecture


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    PDF 32-Bit MB86833 144-pin, FPT-144-M FPT-144P-M08) 144-LEAD 44P-M08) 003jJ\H

    en1 3009

    Abstract: 56KQ MQFP-F256 EM 222 raft pd TSC695F uart example used in k60 l17h 2360D
    Text: INTEGRATED CIRCUITS, SILICON MONOLITHIC, 32-BIT SPARC EMBEDDED PROCESSOR, BASED ON TYPE TSC695F ESCC Detail Specification No. 9512/003 ISSUE 1 February 2004 esa = 11 ss = -i- 1 1 1 iis = a ii: a Document Custodian: European Space Agency - see https://escies.org


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    PDF 32-BIT TSC695F en1 3009 56KQ MQFP-F256 EM 222 raft pd TSC695F uart example used in k60 l17h 2360D