AS7C3512K16P Search Results

AS7C3512K16P Datasheets (4)

Part	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
AS7C3512K16P-4BC	Alliance Semiconductor	3.3V 512K x 16 pipeline burst synchronous SRAM	Original	PDF	383.99KB	10
AS7C3512K16P-4TQC	Alliance Semiconductor	3.3V 512K x 16 pipeline burst synchronous SRAM	Original	PDF	383.99KB	10
AS7C3512K16P-5BC	Alliance Semiconductor	3.3V 512K x 16 pipeline burst synchronous SRAM	Original	PDF	383.99KB	10
AS7C3512K16P-5TQC	Alliance Semiconductor	3.3V 512K x 16 pipeline burst synchronous SRAM	Original	PDF	383.99KB	10

AS7C3512K16P Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Contextual Info: Advance information •■ AS7C3512K16P AS7C3512K18P Il II 3.3V 512K- 16 ‘18 pipeline burst synchronous SRAM Features • • • • • • • • • Organization: 5 2 4 ,2 8 8 w ord s x 16 or 18 bits Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access: 3 . 5 / 3 . 8 / 4 / 5 ns	OCR Scan	AS7C3512K16P AS7C3512K18P 100-pin IPC-SM-782	PDF
siti Abstract: nas77 3512K Contextual Info: Features • • • • • • • • • Organization: 5 2 4 ,2 8 8 w ords x 16 or 18 bits Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access'. 3 . 5 / 3 . 8 / 4 / 5 ns Fast UE access time: 3 . 5 / 3 . 5 / 3 . 8 / 4 ns Fully synchronous register-to-register operation	OCR Scan	100-pin 16P-4T 18P-4T 3512K 16P-5T AS7C3512K18P AS7C3512K16P siti nas77	PDF
A301D Abstract: A211D 4bc 82 Contextual Info: $GYDQFHLQIRUPDWLRQ $6&.3 $6&.3 9.ðSLSHOLQHEXUVWV\QFKURQRXV65$0 HDWXUHV • Multiple packaging options - Economical 100-pin TQFP package - Chip-scale fBGA package for smallest footprint • Byte write enables • Clock enable for operation hold	Original	SLSHOLQHEXUVWV\QFKURQRXV65 100-pin AS7C3512K16P-5TQC AS7C3512K18P-3 AS7C3512K18P-4TQC AS7C3512K18P-5TQC AS7C3512K16P-3 AS7C3512K16P-4BC A301D A211D 4bc 82	PDF

Catalog Datasheet

Type

Document Tags

PDF

Contextual Info: Advance information •■ AS7C3512K16P AS7C3512K18P Il II 3.3V 512K- 16 ‘18 pipeline burst synchronous SRAM Features • • • • • • • • • Organization: 5 2 4 ,2 8 8 w ord s x 16 or 18 bits Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access: 3 . 5 / 3 . 8 / 4 / 5 ns

OCR Scan

AS7C3512K16P AS7C3512K18P 100-pin IPC-SM-782

PDF

siti

Abstract: nas77 3512K
Contextual Info: Features • • • • • • • • • Organization: 5 2 4 ,2 8 8 w ords x 16 or 18 bits Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access'. 3 . 5 / 3 . 8 / 4 / 5 ns Fast UE access time: 3 . 5 / 3 . 5 / 3 . 8 / 4 ns Fully synchronous register-to-register operation

OCR Scan

100-pin 16P-4T 18P-4T 3512K 16P-5T AS7C3512K18P AS7C3512K16P siti nas77

PDF

A301D

Abstract: A211D 4bc 82
Contextual Info: $GYDQFHLQIRUPDWLRQ $6&.3 $6&.3 9.ðSLSHOLQHEXUVWV\QFKURQRXV65$0 HDWXUHV • Multiple packaging options - Economical 100-pin TQFP package - Chip-scale fBGA package for smallest footprint • Byte write enables • Clock enable for operation hold

Original

SLSHOLQHEXUVWV\QFKURQRXV65 100-pin AS7C3512K16P-5TQC AS7C3512K18P-3 AS7C3512K18P-4TQC AS7C3512K18P-5TQC AS7C3512K16P-3 AS7C3512K16P-4BC A301D A211D 4bc 82

PDF