B81V17405A Search Results

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Contextual Info: PRELIMINARY - - May 1996 Edition 1.0 PRODUCT PROFILE SHEET FUJITSU M B 8 1 V17405A-60/-70 CMOS 4M x 4 BIT HYPER PAGE MODE DYNAMIC RAM CM O S 4,194,304 x 4 BIT Hyper Page Mode Dynamic RAM The Fujitsu M B81V17405A is a fully decoded CM OS Dynamic RAM DRAM that contains

Contextual Info: DRAM 4 • DRAM - Low Voltage Versions (CMOS) Vcc= +3.3V+0.3V, Ta=0°C to +70°C Organization (Wx b ) Access Time max. (ns) Part Number Cycle Time min. (ns) Power Consumption max. (mW) Packages Standby Mode ! (CMOS level) SOJ TSOP 1.8 26P 26P 0.54 26P 26P

Contextual Info: MEMORY — M ^ — M ^ — — IM — CMOS 4,194,304 x 4 BIT Hyper Page Mode Dynamic RAM • DESCRIPTION The Fujitsu B81V17405A is a fully decoded CMOS Dynamic RAM DRAM that contains 16,777,216 memory cells accessible in 4-bit increm ents.The B81V17405A features a “hyper page" mode of operation whereby high­

29F400TA

Abstract: FLC31SVC6S MB90P263 15E03L 81V4405C 29lv800ta MB3799 B566 MB47082 29LV800BA
Contextual Info: Index Page Document code Series Series Series Series Series 33 35 36 37 31 - CG51 Series D 5 C B Series D1 F1 Series F2 Series F3 Series 32 112 113 113 113 D S0 4 -2 3 1 1 1 -1 E D S0 4 -2 0 1 0 0 -3 E D S0 4 -2 0 1 0 0 -3 E D S0 4 -2 0 1 0 0 -3 E F4C Series (T1)