CD74FCT273E Search Results

CD4000 series

Abstract: CD4060BE CD4017BE CD40106BE CD4541BE CD4066BE CD4511BE DATASHEET CD4511BE CD4011BE CD4020BE Datasheet
Contextual Info: CD4000 Series CD4001BE CD4001BM CD4001BM96 CD4001UBE CD4001UBM CD4002BE CD4006BE CD4007UBE CD4007UBM CD4009UBE CD4010BE CD4011BE CD4011BM CD4011BM96 CD4011UBE CD4011UBM CD4012BE CD4012BM CD4012BM96 CD4013BE CD4013BM CD4013BM96 CD4014BE CD4015BE CD4016BE

CD74FCT273

Abstract: CD74FCT273E CD74FCT273M
Contextual Info: CD74FCT273 ^ Texas In s t r u m e n t s Data sheet acquired from Harris Sem iconductor SCH S254 BiCMOS FCT Interface Logic, Octal D Flip-Flop with Reset January 1997 Features Circuit Design \Jse ' Speed of Bipolar FAST /AS/S Buffered Inputs 48mA Output Sink Current

Contextual Info: CD74FCT273 BiCMOS OCTAL D-TYPE FLIP-FLOP WITH RESET SCBS737A – JULY 2000 – REVISED JULY 2000 D D D D D D D D D D E OR M PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Direct Clear Input 48-mA Output Sink Current Output Voltage Swing Limited to 3.7 V

Contextual Info: CD74FCT273 BiCMOS OCTAL D-TYPE FLIP-FLOP WITH RESET SCBS737A – JULY 2000 – REVISED JULY 2000 D D D D D D D D D D E OR M PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Direct Clear Input 48-mA Output Sink Current Output Voltage Swing Limited to 3.7 V

Contextual Info: CD74FCT273 BiCMOS OCTAL D-TYPE FLIP-FLOP WITH RESET SCBS737A – JULY 2000 – REVISED JULY 2000 D D D D D D D D D D E OR M PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Direct Clear Input 48-mA Output Sink Current Output Voltage Swing Limited to 3.7 V

chn 834

Abstract: CD74FCT273 CD74FCT273E CD74FCT273M Chn 835
Contextual Info: CD74FCT273 S E M I C O N D U C T O R January 1997 D ENDE M M ECO IGNS NOT R NEW DES ology FOR OS Techn BiCMOS FCT Interface Logic, Octal D Flip-Flop with Reset M Features Use C Description The CD74FCT273 octal D flip-flop with reset uses a small geometry BiCMOS technology. The output stage is a combination of bipolar and CMOS transistors that limits the output HIGH level to two diode drops below VCC. This

Contextual Info: CD74FCT273 BiCMOS OCTAL D-TYPE FLIP-FLOP WITH RESET SCBS737A – JULY 2000 – REVISED JULY 2000 D D D D D D D D D D E OR M PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Direct Clear Input 48-mA Output Sink Current Output Voltage Swing Limited to 3.7 V

Contextual Info: CD74FCT273 BiCMOS OCTAL D-TYPE FLIP-FLOP WITH RESET SCBS737A – JULY 2000 – REVISED JULY 2000 D D D D D D D D D D E OR M PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Direct Clear Input 48-mA Output Sink Current Output Voltage Swing Limited to 3.7 V

Contextual Info: CD74FCT273 ^ Te x a s In s t r u m e n t s Data sheet acquired from Harris Sem iconductor SCH S254 BiCMOS FCT Interface Logic, Octal D Flip-Flop with Reset January 1997 Features NENN TecW \Jse GVvAOS Circuit Design Speed of Bipolar FAST /AS/S Buffered Inputs

Contextual Info: if H A R R CD74FCT273 IS S E M I C O N D U C T O R January 1997 BiCMOS FCT Interface Logic, Octal D Flip-Flop with Reset t & SQSM& E 'Ni OrT w no\ogv Features Description • Buffered Inputs The CD74FCT273 octal D flip-flop with reset uses a small geometry BiCMOS technology. The output stage is a com­

Contextual Info: CD74FCT273 BiCMOS OCTAL D-TYPE FLIP-FLOP WITH RESET SCBS737A – JULY 2000 – REVISED JULY 2000 D D D D D D D D D D E OR M PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Direct Clear Input 48-mA Output Sink Current Output Voltage Swing Limited to 3.7 V

Contextual Info: CD74FCT273 BiCMOS OCTAL D-TYPE FLIP-FLOP WITH RESET SCBS737A – JULY 2000 – REVISED JULY 2000 D D D D D D D D D D E OR M PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Direct Clear Input 48-mA Output Sink Current Output Voltage Swing Limited to 3.7 V

CD74FCT273

Abstract: CD74FCT273E CD74FCT273EE4 CD74FCT273M CD74FCT273M96 CD74FCT273M96E4 CD74FCT273M96G4 CD74FCT273ME4
Contextual Info: CD74FCT273 BiCMOS OCTAL D-TYPE FLIP-FLOP WITH RESET SCBS737A – JULY 2000 – REVISED JULY 2000 D D D D D D D D D D E OR M PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Direct Clear Input 48-mA Output Sink Current Output Voltage Swing Limited to 3.7 V

Contextual Info: CD74FCT273 BiCMOS OCTAL D-TYPE FLIP-FLOP WITH RESET SCBS737A – JULY 2000 – REVISED JULY 2000 D D D D D D D D D D E OR M PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Direct Clear Input 48-mA Output Sink Current Output Voltage Swing Limited to 3.7 V

CD74FCT273

Abstract: CD74FCT273E CD74FCT273EE4 CD74FCT273M CD74FCT273M96 CD74FCT273M96E4 CD74FCT273M96G4 CD74FCT273ME4
Contextual Info: CD74FCT273 BiCMOS OCTAL D-TYPE FLIP-FLOP WITH RESET SCBS737A – JULY 2000 – REVISED JULY 2000 D D D D D D D D D D E OR M PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Direct Clear Input 48-mA Output Sink Current Output Voltage Swing Limited to 3.7 V

CD74FCT273

Abstract: CD74FCT273E CD74FCT273EE4 CD74FCT273M CD74FCT273M96 CD74FCT273M96E4 CD74FCT273ME4
Contextual Info: CD74FCT273 BiCMOS OCTAL D-TYPE FLIP-FLOP WITH RESET SCBS737A – JULY 2000 – REVISED JULY 2000 D D D D D D D D D D E OR M PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Direct Clear Input 48-mA Output Sink Current Output Voltage Swing Limited to 3.7 V

Contextual Info: CD74FCT273 BiCMOS OCTAL D-TYPE FLIP-FLOP WITH RESET SCBS737A – JULY 2000 – REVISED JULY 2000 D D D D D D D D D D E OR M PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Direct Clear Input 48-mA Output Sink Current Output Voltage Swing Limited to 3.7 V

CD74FCT273

Abstract: CD74FCT273E CD74FCT273M
Contextual Info: CD74FCT273 Data sheet acquired from Harris Semiconductor SCHS254 January 1997 Features BiCMOS FCT Interface Logic, Octal D Flip-Flop with Reset D ENDE M M O S EC IGN NOT R NEW DES ology FOR OS Techn M Use C • • • • • • • Buffered Inputs • Typical Propagation Delay: 5.3ns at VCC = 5V,

Contextual Info: CD74FCT273 BiCMOS OCTAL D-TYPE FLIP-FLOP WITH RESET SCBS737A – JULY 2000 – REVISED JULY 2000 D D D D D D D D D D E OR M PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Direct Clear Input 48-mA Output Sink Current Output Voltage Swing Limited to 3.7 V

Contextual Info: CD74FCT273 BiCMOS OCTAL D-TYPE FLIP-FLOP WITH RESET SCBS737A – JULY 2000 – REVISED JULY 2000 D D D D D D D D D D E OR M PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Direct Clear Input 48-mA Output Sink Current Output Voltage Swing Limited to 3.7 V

K7200

Abstract: 50c60 K7300 CD74AC02M CD74AC14M harris CD74FCT541* harris Harris CD74ACT174M CD4000 CD74ACT245M 92AT
Contextual Info: TEXAS INSTRUMENTS Final Notification of the ACL-H Process Qualification for Acquisition of Harris Semiconductor AC/ACT/FCT Logic Business April 26, 1999 Abstract Texas Instruments Standard Linear and Logic Products SLL is pleased to announce the successful

diode zo 150 6d

Contextual Info: CD74FCT273 BiCMOS OCTAL D-TYPE FLIP-FLOP WITH RESET SCBS737A – JULY 2000 – REVISED JULY 2000 D D D D D D D D D D E OR M PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Direct Clear Input 48-mA Output Sink Current Output Voltage Swing Limited to 3.7 V

CD74FCT273

Abstract: CD74FCT273E CD74FCT273EE4 CD74FCT273M CD74FCT273ME4 CD74FCT273MG4
Contextual Info: CD74FCT273 BiCMOS OCTAL D-TYPE FLIP-FLOP WITH RESET SCBS737A – JULY 2000 – REVISED JULY 2000 D D D D D D D D D D E OR M PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Direct Clear Input 48-mA Output Sink Current Output Voltage Swing Limited to 3.7 V