CP 6, WIMO Search Results

Contextual Info: A S D MT4C1259 883C 256K X 1 DRAM AUSTIN SEMICONDUCTOR, INC. D R A M 2 5 6 K X 1 D R A M FAST PAGE MODE AVAILABLE AS MILITARY SPECIFICATIONS PIN ASSIGNMENT Top View • MIL-STD-883 18-Pin LCC 16-Pin DIP (D-2) FEATURES • Industry standard pinout and timing

65536X4

Contextual Info: A U S T I N S I MIC O N D I C T O R MI?F4067 8?C 64K X 4 D R A M IN< DRAM 64K X 4 DRAM FAST PAGE MODE AVAILABLE AS MILITARY SPECIFICATION PIN ASSIGNMENT Top View • SM D 5962-92132 • M IL-STD -883 18-Pin DIP (D-6) FEATURES ÖE [ 1 • Industry standard pinout and tim ing

Contextual Info: MT24D236 2 MEG X 36. 4 MEG x 18 DRAM MODULE M IC R O N 2 MEG DRAM MODULE X 36, 4 MEG X 18 FAST PAGE MODE MT24D236 LOW POWER, EXTENDED REFRESH (MT24D236 L) FEATURES • Industry standard pinout in a 72-pin single-in-line package • High-performance, CM OS silicon-gate process

Texas Instruments TTL 1985

Contextual Info: TEXAS I N S T R -CASIC/MEMORY! 77 8 9 0 1 7 2 5 TEXAS INSTR ASIC/MEMORY ADVANCE INFORMATION D D j üThJjVdh □□4Q7T4 77C 4 0794 D TM4256EQ5, TM4257EQ5 262,144 BY 5-BIT DYNAMIC RAM MODULES OCTOBER 1 98 5 — REVISED NOVEMBER 1986 • 2 6 2 ,1 4 4 X 5 Organization

T4C400

Abstract: mt4c4004jdj
Contextual Info: M T4C4004J 1 MEG X 4 DRAM l^ldRON DRAM 1 MEG x 4 DRAM QUAD CAS PARITY, FAST PAGE MODE FEATURES _ • Four independent C A S controls, allo w ing in d ivid u al m anipulation to each of the four data In p u t/O u tp ut ports DQ1 through DQ4 . • Offers a single chip solution to byte level parity for 36bit words w hen using 1 M eg x 4 D R A M s for m emory

siemens g52

Abstract: ABB STT 111 AJ 11P 20mA13 STT 3 SIEMENS BB833 TUA6110XS d bb833 SIEMENS marking MB1700
Contextual Info: \ « ♦ S IE M E N S T U A 6 1 10X S p re lim in a ry IC -S P E C IF IC A T IO N C ontents SAT M ixer-O scillator-PLL for 3.3G H z C ontents Functional D escription, Application Pin Defintion and Function Block Diagram Circuit Description Pinning, Package

Contextual Info: ADVANCE I QUANTUM DEVICES INC FLASH MEMORY 256K x 16,512K x 8 FEATURES • Seven erase blocks: - 16KB/8K-word boot block protected - Two 8KB / 4K-word parameter blocks - Four general memory blocks • Low power 100(iA standby; 60mA active, MAX • 5V±10% read; 12V±5% write/erase

intel 8288

Abstract: intel 8288 bus controller 8085 MICROCOMPUTER SYSTEMS USERS MANUAL 8086 interrupt structure design fire alarm 8088 microprocessor RCA SK CROSS-REFERENCE 8086 family users manual 8086 user manual AP 67 weir smm 200
Contextual Info: iAPX 86, 88 USER'S MANUAL AUGUST 1981 Intel Corporation makes no warranty for the use of its products and assumes no responsibility for any errors which may appear in this document nor does it make a commitment to update the information contained herein. Intel software products are copyrighted by and shall remain the property of Intel Corporation. Use, duplication or