CRCW06031K00FKTA Search Results

2N2007E

Abstract: 2N2007 CAP 10nF 50V 0603 18126D107MAT 597D108X06
Contextual Info: MIC5162 Dual Regulator Controller for DDR3 GDDR3/4/5 Memory and High-Speed Bus Termination General Description Features The MIC5162 is a dual regulator controller designed for highspeed bus termination. It offers a simple, low-cost JEDEC compliant solution for terminating high-speed, lowvoltage digital buses i.e. DDR, DD2, DDR3, SCSI, GTL,

DDR3 pcb layout guidelines

Abstract: MIC5162YMM DDR3 pcb layout CRCW06031K00FKTA C1608X5R0J106M C2012X5R0J226M GRM188R60J106ME47D GRM21BR60J226ME39L MIC5162 MSOP-10
Contextual Info: MIC5162 Dual Regulator Controller for DDR3 GDDR3/4/5 Memory and High-Speed Bus Termination General Description Features The MIC5162 is a dual regulator controller designed for • Input voltage range: 1.35V to 6V high speed bus termination. It offers a simple, low-cost

DDR3 pcb layout guidelines

Abstract: DDR3 pcb layout ddr3 termination 10x10.2 C1608X5R0J106M C2012X5R0J226M GRM188R60J106ME47D GRM21BR60J226ME39L MSOP-10 ddr3 layout
Contextual Info: MIC5165 Dual Regulator Controller for DDR3 GDDR3/4/5 Memory Termination General Description Features The MIC5165 is a dual regulator controller designed • Input voltage range: 0.75V to 6V specifically for low-voltage memory termination • Up to 7A VTT Current

TCJB107M006R0070

Abstract: C1608X5R0J106M C2012X5R0J226M GRM188R60J106ME47D GRM21BR60J226ME39L MSOP-10 Mosfet selection 08056D226
Contextual Info: MIC5164 Dual Regulator Controller for DDR3 GDDR3/4/5 Memory and High-Speed Bus Termination General Description Features The MIC5164 is a dual regulator controller designed for high speed bus termination. It offers a simple, low-cost JEDEC-compliant solution for terminating high-speed, lowvoltage digital buses i.e. DDR, DDR2, DDR3, SCSI, GTL,

Contextual Info: MIC5165 Dual Regulator Controller for DDR3 GDDR3/4/5 Memory Termination General Description Features The MIC5165 is a dual regulator controller designed • Input voltage range: 0.75V to 6V specifically for low-voltage memory termination • Up to 7A VTT Current

Contextual Info: MIC5163 Dual Regulator Controller for DDR3 GDDR3/4/5 Memory Termination General Description Features The MIC5163 is a dual regulator controller designed • 0.75V to 6V input supply voltage specifically for low voltage memory termination • Memory termination for: DDR3, GDDR3/4/5

Contextual Info: MIC5164YMM Evaluation Board Dual Regulator Controller for DDR3, GDDR3/4/5 Memory Termination Power Good Signal General Description The MIC5164 is a dual regulator controller for high speed bus termination that offers a simple, low-cost JEDECcompliant solution for terminating high-speed, low-voltage

Contextual Info: MIC29302A 3A Fast-Response LDO Regulator General Description Features The MIC29302A is a high-current, low-cost, low-dropout voltage regulator that uses Micrel's proprietary Super βeta PNP process with a PNP pass element. The 3A LDO regulator features 450mV full load dropout voltage and

Contextual Info: MIC29302A 3A Fast-Response LDO Regulator General Description Features The MIC29302A is a high-current, low-cost, low-dropout voltage regulator which uses Micrel's proprietary Super eta PNP process with a PNP pass element. The 3A LDO regulator features 450mV full load dropout voltage

Contextual Info: MIC5165YMM Evaluation Board Dual Regulator Controller for DDR3, GDDR3/4/5 Memory Termination Power Good Signal General Description The MIC5165 is a dual regulator controller for high-speed bus termination that offers a simple, low-cost JEDECcompliant solution for terminating high-speed, low-voltage

MIC29302AWU

Abstract: elect capacitor MIC29302AWD
Contextual Info: MIC29302A 3A Fast-Response LDO Regulator General Description Features The MIC29302A is a high-current, low-cost, low-dropout voltage regulator which uses Micrel's proprietary Super βeta PNP process with a PNP pass element. The 3A LDO regulator features 450mV full load dropout voltage

Contextual Info: MIC5164 Dual Regulator Controller for DDR3 GDDR3/4/5 Memory and High-Speed Bus Termination General Description Features The MIC5164 is a dual regulator controller designed for high speed bus termination. It offers a simple, low-cost JEDEC-compliant solution for terminating high-speed, lowvoltage digital buses i.e. DDR, DDR2, DDR3, SCSI, GTL,

2N2007

Abstract: 2N2007E ddr3 termination 18126D107MAT ddr3 SSN SOT-23 SANYO 1000uF 35V MSOP-10 SUD50N02-06P tp1322
Contextual Info: MIC5163 Dual Regulator Controller for DDR3 GDDR3/4/5 Memory Termination General Description Features The MIC5163 is a dual regulator controller designed • 0.75V to 6V input supply voltage specifically for low voltage memory termination • Memory termination for: DDR3, GDDR3/4/5