CS26LV64173 Search Results
CS26LV64173 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
CS26LV64173Contextual Info: Low Power Pseudo SRAM 4 M Words x 16 bit CS26LV64173 Revision History Rev. No. 1.0 History Issue Date 1. New Release. Mar.27, 2013 2. Product Process change from 90nm to 65nm 3. The device build in Power Saving mode as below : 3-1. Deep Power Down DPD 3-2. Partial Array Refresh (PAR) |
Original |
CS26LV64173 CS26LV64173 |