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CY38007P20 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
n20s Abstract: A144 BG256 IEEE1164 Military Plastic pASIC 3 Family 256 Contextual Info: 3T PRELIMINARY CYPRESS Ultra38007 UltraLogic Very High Speed 7K Gate CMOS FPGA Features — Minimum Iol and Ioh 24 mA Flexible logic cell architecture — Wide fan-in up to 16 input gates — Multiple outputs in each cell — Very low cell propagation delay	OCR Scan	144-pin 208-pin 256-pin 16-bit Ultra38007 208-Pin CY38007P20 CY38007P144â n20s A144 BG256 IEEE1164 Military Plastic pASIC 3 Family 256	PDF
AAAG 6 pin ic Abstract: n208 Contextual Info: CYPRESS Features PRELIMINARY UltraLogic Very High Speed 7K Gate CMOS FPGA — Minimum Iol and Ioh ° f 24 mA • Flexible logic cell architecture — Wide fan-in up to 16 input gates — Multiple outputs in each cell — Very low cell propagation delay	OCR Scan	144-Pin 256-Pad 208-Pin AAAG 6 pin ic n208	PDF
CY38007P144-1AC Abstract: CY38007P144-1AI CY38007P144-2AC CY38007P144-2AI CY38007P208-2NC CY38007P208-2NI CY38007P256-1BGC CY38007P256-2BGC IEEE1164 Contextual Info: 7c3807: Tuesday, July 25, 1995 Rev date: October 25, 1995 PRELIMINARY UltraLogic Ultra38007 t Very High Speed 7K Gate CMOS FPGA Features Ċ D Very high speed Loadable counter frequencies greater than 185 MHz Ċ ChipĆtoĆchip operating frequencies up to 135 MHz	Original	7c3807: Ultra38007 144pin 208pin 256pin 16bit CY38007P144-1AC CY38007P144-1AI CY38007P144-2AC CY38007P144-2AI CY38007P208-2NC CY38007P208-2NI CY38007P256-1BGC CY38007P256-2BGC IEEE1164	PDF
7C380 Abstract: H7C3 Contextual Info: PRELIMINARY CYPRESS UltraLogic Very High Speed 7K Gate CMOS FPGA Features — M inimum I o l and • Very high speed — Loadable counter frequencies greater than 185 MHz — Chip-to-chip operating frequencies up to 135 MHz — Input + logic cell + output delays	OCR Scan	144-pin 208-pin 256-pin 16-bit Ultra38007 256-Pad 7C380 H7C3	PDF