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    CY7C1294DV18 Search Results

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    CY7C1294DV18 Price and Stock

    Infineon Technologies AG CY7C1294DV18-167BZC

    IC SRAM 9MBIT PAR 167MHZ 165FBGA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C1294DV18-167BZC Tray 136
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    Rochester Electronics LLC CY7C1294DV18-167BZC

    IC SRAM 9MBIT PAR 167MHZ 165FBGA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C1294DV18-167BZC Tray 14
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    • 100 $22.27
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    Cypress Semiconductor CY7C1294DV18-167BZC

    CY7C1294DV18-167BZC
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Verical CY7C1294DV18-167BZC 108 25
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    Rochester Electronics CY7C1294DV18-167BZC 108 1
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    • 100 $20.34
    • 1000 $18.2
    • 10000 $17.13
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    CY7C1294DV18 Datasheets (2)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY7C1294DV18
    Cypress Semiconductor 9-Mbit QDR- II SRAM 2-Word Burst Architecture Original PDF
    CY7C1294DV18-167BZC
    Cypress Semiconductor 9-Mbit QDR- II SRAM 2-Word Burst Architecture Original PDF

    CY7C1294DV18 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    CY7C1292DV18

    Abstract: CY7C1294DV18
    Contextual Info: CY7C1292DV18 CY7C1294DV18 9-Mbit QDR- II SRAM 2-Word Burst Architecture Features Functional Description • Separate Independent Read and Write data ports The CY7C1292DV18 and CY7C1294DV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate


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    CY7C1292DV18 CY7C1294DV18 CY7C1292DV18 CY7C1294DV18 PDF

    Contextual Info: CY7C1292DV18 CY7C1294DV18 PRELIMINARY 9-Mbit QDR-II SRAM 2-Word Burst Architecture Features Configurations • Separate Independent Read and Write data ports — Supports concurrent transactions • 300-MHz clock for high bandwidth • 2-Word Burst on all accesses


    Original
    CY7C1292DV18 CY7C1294DV18 300-MHz CY7C1292DV18/CY7C1294DV18 PDF

    CY7C1292DV18

    Abstract: CY7C1294DV18
    Contextual Info: CY7C1292DV18 CY7C1294DV18 9-Mbit QDR- II SRAM 2-Word Burst Architecture Features Functional Description • Separate Independent Read and Write data ports The CY7C1292DV18 and CY7C1294DV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate


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    CY7C1292DV18 CY7C1294DV18 CY7C1292DV18 CY7C1294DV18 PDF

    Contextual Info: THIS SPEC IS OBSOLETE Spec No: 001-00350 Spec Title: CY7C1292DV18/CY7C1294DV18 9-Mbit QDR II SRAM 2-Word Burst Architecture Sunset Owner: AJU Replaced By: None CY7C1292DV18 CY7C1294DV18 9-Mbit QDR® II SRAM 2-Word Burst Architecture Features Configurations


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    CY7C1292DV18/CY7C1294DV18 CY7C1292DV18 CY7C1294DV18 PDF

    Contextual Info: CY7C1292DV18 CY7C1294DV18 9-Mbit QDR II SRAM 2-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions CY7C1292DV18 – 512K x 18 CY7C1294DV18 – 256K x 36 ■ 250 MHz clock for high bandwidth


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    CY7C1292DV18 CY7C1294DV18 CY7C1292DV18 PDF