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    CY7C1350 Search Results

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    CY7C1350 Price and Stock

    Rochester Electronics LLC CY7C1350G-200AXI

    IC SRAM 4.5MBIT PAR 100TQFP
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C1350G-200AXI Bulk 2,897 51
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    Rochester Electronics LLC CY7C1350G-200AXC

    ZBT SRAM, 128KX36, 2.8NS PQFP100
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C1350G-200AXC Bulk 1,925 53
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    Rochester Electronics LLC CY7C1350G-133BGXC

    IC SRAM 4.5MBIT PAR 119PBGA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C1350G-133BGXC Tray 1,564 50
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    Rochester Electronics LLC CY7C1350G-166AXC

    IC SRAM 4.5MBIT PAR 100TQFP
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    DigiKey CY7C1350G-166AXC Bulk 800 113
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    Rochester Electronics LLC CY7C1350S-133AXI

    IC SRAM 4.5MBIT PARALLEL 100TQFP
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C1350S-133AXI Bag 684 59
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    CY7C1350 Datasheets (81)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF PDF Size Page count
    CY7C1350
    Cypress Semiconductor 128Kx36 Pipelined SRAM with NoBL Architecture Original PDF 230.16KB 13
    CY7C1350
    Cypress Semiconductor NoBL, The ZBT-Compatible Family Original PDF 57.46KB 3
    CY7C1350-100AC
    Cypress Semiconductor 128K x 36 Pipelined SRAM with NoBL Architecture Original PDF 230.16KB 13
    CY7C1350-100AC
    Cypress Semiconductor 128Kx36 Pipelined SRAM with NoBL Architecture Original PDF 189.83KB 13
    CY7C1350-133AC
    Cypress Semiconductor 128K x 36 Pipelined SRAM with NoBL Architecture Original PDF 230.16KB 13
    CY7C1350-133AC
    Cypress Semiconductor 128Kx36 Pipelined SRAM with NoBL Architecture Original PDF 189.83KB 13
    CY7C1350-143AC
    Cypress Semiconductor 128K x 36 Pipelined SRAM with NoBL Architecture Original PDF 230.16KB 13
    CY7C1350-143AC
    Cypress Semiconductor 128Kx36 Pipelined SRAM with NoBL Architecture Original PDF 189.83KB 13
    CY7C1350-80AC
    Cypress Semiconductor 128K x 36 Pipelined SRAM with NoBL Architecture Original PDF 230.16KB 13
    CY7C1350-80AC
    Cypress Semiconductor 128Kx36 Pipelined SRAM with NoBL Architecture Original PDF 189.83KB 13
    CY7C1350B
    Cypress Semiconductor 128Kx36 Pipelined SRAM with NoBL Architecture Original PDF 201.14KB 14
    CY7C1350B-143AC
    Cypress Semiconductor 128Kx36 Pipelined SRAM with NoBL Architecture Original PDF 201.16KB 14
    CY7C1350B-150AC
    Cypress Semiconductor 128Kx36 Pipelined SRAM with NoBL Architecture Original PDF 201.15KB 14
    CY7C1350B-166AC
    Cypress Semiconductor 128Kx36 Pipelined SRAM with NoBL Architecture Original PDF 201.15KB 14
    CY7C1350F
    Cypress Semiconductor 4-Mb (128K x 36) Pipelined SRAM with Nobl Architecture Original PDF 397.74KB 16
    CY7C1350F-100AC
    Cypress Semiconductor 4-Mb (128K x 36) Pipelined SRAM with Nobl Architecture Original PDF 397.74KB 16
    CY7C1350F-100AI
    Cypress Semiconductor Original PDF 397.74KB 16
    CY7C1350F-100BGC
    Cypress Semiconductor Original PDF 397.74KB 16
    CY7C1350F-100BGI
    Cypress Semiconductor Original PDF 397.74KB 16
    CY7C1350F-133AC
    Cypress Semiconductor 4-Mb (128K x 36) Pipelined SRAM with Nobl Architecture Original PDF 397.74KB 16

    CY7C1350 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    CY7C1350

    Abstract: IDT71V546 MCM63Z736
    Contextual Info: fax id: 1103 CY7C1350 PRELIMINARY 128Kx36 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT devices IDT71V546, MT55L128L36P and MCM63Z736 • Supports 143-MHz bus operations with zero wait


    Original
    CY7C1350 128Kx36 IDT71V546, MT55L128L36P MCM63Z736 143-MHz CY7C1350 IDT71V546 MCM63Z736 PDF

    CY7C1350

    Contextual Info: fax id: 1103 * g S S M ^ % rrv rt n n n CY7C1350 PRELIMINARY 128Kx36 Pipelined SRAM with NoBL Architecture F e a tu re s F u n c t io n a l D e s c r ip t io n • Pin compatible and functionally e q u iv a le n ts ZBT™ devices IDT71V546, MT55L128L36P and MCM63Z736


    OCR Scan
    CY7C1350 128Kx36 IDT71V546, MT55L128L36P MCM63Z736 CY7C1350 143-MHz PDF

    CY7C1350B-80AC

    Abstract: CY7C1350B
    Contextual Info: PRELIMINARY CY7C1350B 128Kx36 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT™ devices IDT71V546, MT55L128L36P, and MCM63Z736 • Supports 166-MHz bus operations with zero wait states


    Original
    CY7C1350B 128Kx36 IDT71V546, MT55L128L36P, MCM63Z736 166-MHz 150-MHz 143-MHz 133-MHz CY7C1350B-80AC CY7C1350B PDF

    CY7C1350F

    Abstract: CY7C1350F-250AC CY7C1350F-250AI CY7C1350F-250BGC
    Contextual Info: CY7C1350F CY7C1350F 4-Mb 128K x 36 Pipelined SRAM with Nobl Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE


    Original
    1CY7C1350F CY7C1350F CY7C1350F CY7C1350F-250AC CY7C1350F-250AI CY7C1350F-250BGC PDF

    CY7C1350G

    Contextual Info: CY7C1350G 4-Mbit 128K x 36 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability


    Original
    CY7C1350G CY7C1350G A100RA PDF

    CY7C1350G

    Contextual Info: CY7C1350G 4-Mbit 128 K x 36 Pipelined SRAM with NoBL Architecture 4-Mbit (128 K × 36) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT™ devices ■ Internally self-timed output buffer control to eliminate the need


    Original
    CY7C1350G 250-MHz 100-pin 119-ball CY7C1350G PDF

    CY7C1350F

    Abstract: CY7C1350F-250AC CY7C1350F-250AI CY7C1350F-250BGC
    Contextual Info: CY7C1350F CY7C1350F 4-Mb 128K x 36 Pipelined SRAM with Nobl Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE


    Original
    1CY7C1350F CY7C1350F CY7C1350F CY7C1350F-250AC CY7C1350F-250AI CY7C1350F-250BGC PDF

    CY7C1350

    Contextual Info: fax id: 1103 CY7C1350 PRELIMINARY 128Kx36 Pipelined SRAM with NoBL Architecture Features Functional Description • Supports 143-MHz bus operations with zero wait states—Data is transferred on every clock The CY7C1350 is a 3.3V 128K by 36 synchronous-pipelined


    Original
    CY7C1350 128Kx36 143-MHz CY7C1350 PDF

    CY7C1350

    Abstract: IDT71V546 MCM63Z736
    Contextual Info: fax id: 1103 Back CY7C1350 PRELIMINARY 128Kx36 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT devices IDT71V546, MT55L128L36P and MCM63Z736 • Supports 143-MHz bus operations with zero wait


    Original
    CY7C1350 128Kx36 IDT71V546, MT55L128L36P MCM63Z736 143-MHz CY7C1350 IDT71V546 MCM63Z736 PDF

    Contextual Info: 350A CY7C1350A/GVT71128ZC36 128Kx36 Pipelined SRAM with NoBL Architecture Features • Zero Bus Latency, no dead cycles between write and read cycles • Fast clock speed: 143, 133 and 100 MHzInternally synchronized registered outputs eliminate the need to control OE


    Original
    CY7C1350A/GVT71128ZC36 128Kx36 CY7C1350A/GVT71128ZC36 PDF

    CY7C1350

    Abstract: CY7C1351 CY7C1353
    Contextual Info: Cypress Semiconductor Qualification Report QTP# 98357 VERSION 1.1 May, 1999 4 Meg SRAM With NoBL Architecture R42D Technology, Hot Aluminum CY7C1350 128K x 36 Pipelined SRAM CY7C1351 128K x 36 Flow-Through SRAM CT7C1352 256K x 18 Pipelined SRAM CY7C1353


    Original
    CY7C1350 CY7C1351 CT7C1352 CY7C1353 CY7C1350/1351/1352/1353 CY7C1352-AC 30C/60 CY7C1350-AC CY7C1350 CY7C1351 CY7C1353 PDF

    CY7C1350G

    Contextual Info: CY7C1350G 4-Mbit 128 K x 36 Pipelined SRAM with NoBL Architecture 4-Mbit (128 K × 36) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT™ devices ■ Internally self-timed output buffer control to eliminate the need


    Original
    CY7C1350G 250-MHz 100-pin 119-ball CY7C1350G PDF

    CY7C1350B

    Abstract: CY7C1329 CY7C1351B CY7C1352B CY7C1353B
    Contextual Info: Cypress Semiconductor Product Qualification Report QTP# 99245 VERSION 3.0 December, 2000 4 Meg Synchronous SRAM R52D-3 Technology, Fab 4 CY7C1350B 128K x 36 Pipeline SRAM with NoBL Architecture CY7C1351B 128K x 36 Flow Through SRAM with NoBL™ Architecture


    Original
    R52D-3 CY7C1350B CY7C1351B CY7C1352B CY7C1353B CY7C1329-AC 30C/60 CY7C1350B CY7C1329 CY7C1351B CY7C1352B CY7C1353B PDF

    Contextual Info: CY7C1350G 4-Mbit 128 K x 36 Pipelined SRAM with NoBL Architecture 4-Mbit (128 K × 36) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT™ devices ■ Internally self-timed output buffer control to eliminate the need


    Original
    CY7C1350G 200-MHz 100-pin PDF

    CY7C1350B

    Contextual Info: CY7C1350B PRELIMINARY CY7C1350B 128Kx36 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT™ devices IDT71V546, MT55L128L36P, and MCM63Z736 • Supports 166-MHz bus operations with zero wait states


    Original
    1CY7C1350B CY7C1350B 128Kx36 IDT71V546, MT55L128L36P, MCM63Z736 166-MHz 150-MHz 143-MHz CY7C1350B PDF

    CY7C1350B

    Abstract: 350B IDT71V546 MCM63Z736 DP330
    Contextual Info: 350B PRELIMINARY CY7C1350B 128Kx36 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT™ devices IDT71V546, MT55L128L36P, and MCM63Z736 • Supports 166-MHz bus operations with zero wait states


    Original
    CY7C1350B 128Kx36 IDT71V546, MT55L128L36P, MCM63Z736 166-MHz 150-MHz 143-MHz 133-MHz CY7C1350B 350B IDT71V546 MCM63Z736 DP330 PDF

    CY7C1350G

    Contextual Info: CY7C1350G 4-Mbit 128K x 36 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability


    Original
    CY7C1350G CY7C1350G PDF

    Contextual Info: CY7C1350G 4-Mbit 128 K x 36 Pipelined SRAM with NoBL Architecture 4-Mbit (128 K × 36) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT™ devices ■ Internally self-timed output buffer control to eliminate the need


    Original
    CY7C1350G CY7C1350G PDF

    CY7C1350F

    Contextual Info: 350F PRELIMINARY CY7C1350F 128Kx36 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Fully registered inputs and outputs for pipelined


    Original
    CY7C1350F 128Kx36 250-MHz CY7C1350F PDF

    Contextual Info: CY7C1350G 4-Mbit 128 K x 36 Pipelined SRAM with NoBL Architecture 4-Mbit (128 K × 36) Pipelined SRAM with NoBL™ Architecture Functional Description Features • Pin compatible and functionally equivalent to ZBT™ devices ■ Internally self-timed output buffer control to eliminate the need


    Original
    CY7C1350G 200-MHz 100-pin PDF

    CY7C1350G

    Contextual Info: CY7C1350G 4-Mbit 128K x 36 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability


    Original
    CY7C1350G CY7C1350G PDF

    Contextual Info: CY7C1350G 4-Mbit 128K x 36 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability


    Original
    CY7C1350G 250-MHz 200-MHz 166-MHz 133-MHz A100RA PDF

    A8299

    Contextual Info: CY7C1350G 4-Mbit 128 K x 36 Pipelined SRAM with NoBL Architecture 4-Mbit (128 K × 36) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT™ devices ■ Internally self-timed output buffer control to eliminate the need


    Original
    CY7C1350G CY7C1350G A8299 PDF

    Contextual Info: CY7C1350G 4-Mbit 128K x 36 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability


    Original
    CY7C1350G 250-MHz 200-MHz 166-MHz 133-MHz 100-MHz 100-pin 119-ball PDF