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    CY7C157A Search Results

    CY7C157A Datasheets (12)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY7C157A-18JC Cypress Semiconductor 16,384 x 16 Static R/W Cache Storage Unit Scan PDF
    CY7C157A-18LC Cypress Semiconductor 16,384 x 16 Static R/W Cache Storage Unit Scan PDF
    CY7C157A-20JC Cypress Semiconductor 16,384 x 16 Static R/W Cache Storage Unit Scan PDF
    CY7C157A-20LC Cypress Semiconductor 16,384 x 16 Static R/W Cache Storage Unit Scan PDF
    CY7C157A-24JC Cypress Semiconductor 16,384 x 16 Static R/W Cache Storage Unit Scan PDF
    CY7C157A-24LC Cypress Semiconductor 16,384 x 16 Static R/W Cache Storage Unit Scan PDF
    CY7C157A-24LMB Cypress Semiconductor 16,384 x 16 Static R/W Cache Storage Unit Scan PDF
    CY7C157A-24YMB Cypress Semiconductor 16,384 x 16 Static R/W Cache Storage Unit Scan PDF
    CY7C157A-33JC Cypress Semiconductor 16,384 x 16 Static R/W Cache Storage Unit Scan PDF
    CY7C157A-33LC Cypress Semiconductor 16,384 x 16 Static R/W Cache Storage Unit Scan PDF
    CY7C157A-33LMB Cypress Semiconductor 16,384 x 16 Static R/W Cache Storage Unit Scan PDF
    CY7C157A-33YMB Cypress Semiconductor 16,384 x 16 Static R/W Cache Storage Unit Scan PDF

    CY7C157A Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    j6920

    Abstract: CY7C600
    Text: CYPRESS SEMICONDUCTOR MbE D O SSÔTbbS □□□bLf33 S Z I CYP v CYPRESS -­ SEMICONDUCTOR CY7C157A 16,384 x 16 Static R/W Cache Storage Unit Features Ebnctional Description • Optimized for use with RISC proces­ sors, Including SPARC • Address and WE registers


    OCR Scan     		PDF bLf33 CY7C157A CY7C157A 15bits. CY7C600 Readin24JC CY7C157A-24LMB" CY7C157A-24YMB CY7C157A-33LC j6920

    CY7C157A

    Abstract: No abstract text available
    Text: CY7C157A 16,384 x 16 Static R/W Cache Storage Unit PRELIMINARY CYPRESS _ SEMICONDUCTOR Features • Optimized for use with CY7C600 SPARC product family • Address and WE registers • CMOS for optimum speed/power • High speed - 2 0 ns • Data In and Data Out latches


    OCR Scan     		PDF CY7C600 CY7C157A 7C157A 38-R-10007 7C157A-20 7C157A-24 7C1S7A-33

    j6920

    Abstract: No abstract text available
    Text: CY7C157A CYPRESS SEMICONDUCTOR Features Functional Description • Optimized for use with RISC proces­ sors, including SPARC • Address and WE registers • CMOS for optimum speed/power • High speed — 18 ns T h e C Y 7C157A cache storage u n it is a


    OCR Scan     		PDF CY7C157A CY7C600 oY7C157A-20LC CY7C157A-20JC CY7C157A-24LC CY7C157A-24JC CY7C157A-24LMB CY7C157A-24YMB j6920

    C1576

    Abstract: No abstract text available
    Text: CYPRESS MbE D SEMICONDUCTOR SSñRbbE D DG b L f 33 S D CYP CY7C157A CYPRESS SEMICONDUCTOR Features Functional Description • O ptim ized for u se w ith R IS C p ro ces­ so rs, Includin g SPARC T h e C Y 7C 157A cach e sto rag e u n it is a hig h-perform ance C M O S static R A M o r ­


    OCR Scan     		PDF CY7C157A 384x16 fallin-33LC 7C157A -33JC -33LM C1576

    Untitled

    Abstract: No abstract text available
    Text: CY7C157A CYPRESS SEMICONDUCTOR Features Functional Description • Optimized for use with RISC proces­ sors, including SPARC • Address and WE registers • CMOS for optimum speed/power • High speed — 18 ns T h e C Y 7C157A cache storage u n it is a


    OCR Scan     		PDF CY7C157A 7C157A 7C600

    CY7C157A

    Abstract: C1572 7C600
    Text: CY7C157A JS r ' v p p r c c W SEMICONDUCTOR Features Functional Description • Optimized for use with RISC procès* sors, including SPARC The CY 7C157A cache storage unit is a high-perform ance CM O S static R A M o r­ ganized as 16,384 x 16 bits. It is optim ized


    OCR Scan     		PDF CY7C157A CY7C157A 7C600 7C157A 384x16 7C157A-33LC -33JC CY7C157A-33LM 7C157A-33YM C1572

    CY7C601

    Abstract: CY7C600 7C600 CY7C157A
    Text: • - ^ SEMICONDUCTOR Introduction to RISC and com piler design. A t each step, com puter architects must ask: to what extent does a feature improve o r degrade perform ance and is it w orth the cost of im plem entation? Each additional feature, no m atter how useful it is in an isolated instance, makes all others p er­


    OCR Scan     		PDF CY7C600 7C600 64-kbyte 32-byte CY7C604A 16-bit CY7C601 CY7C157A

    Untitled

    Abstract: No abstract text available
    Text: CYPRESS MbE D SEMICONDUCTOR ^ asa-Ttta oao74t.i T - M i- n - 3 8 CYPRESS SEMICONDUCTOR • Reduced Instruction Set Computer RISC Architecture — Simple format instructions — M ost instructions execute in a single cycle • Very high performance — 25-, 33-, and 40-MHz clock speeds


    OCR Scan     		PDF oao74t 40-MHz 32-bit CY7C601A 207-pin CY7C601 CY7C601Achip,

    CY7C601

    Abstract: CY7C601A bicc CY7C602A WORD11
    Text: CY7C601A CYPRESS SEMICONDUCTOR Features • Reduced Instruction Set Computer RISC Architecture — Simple format instructions — Most instructions execute in a single cycle • Very high performance — 25-, 33*, and 40-MHz clock speeds yield 18,24, and 29 MIPS sustained


    OCR Scan     		PDF CY7C601A 32-Bit 40-MHz CY7C601 38-R-10001-A bicc CY7C602A WORD11

    CY7C601

    Abstract: No abstract text available
    Text: " ^ ^ 5 jF CY7C604A _ - _ - . - - - • - Cache Controller and Memory Management Unit CYPRESS — SEMICONDUCTOR Features • Fully conforms to the SPARC Reference Memory M anagement Unit M M U Architecture • Hardware table walk Description


    OCR Scan     		PDF CY7C604A 7C604A 7C601A 7C157A 16-Kbyte 64-Kbyte, CY7C601

    TAG scr Selection Guide

    Abstract: CY7C604
    Text: CYPRESS SEMICONDUCTOR 4bE D m asa^bbs 0007475 1 ^ 5 3 - - 3 3 - a .S T CYPRESS SEMICONDUCTOR • Fully conforms to the SPARC Refer­ ence Memory Management Unit MMU Architecture • Support for virtual memory • Supports context snitching — 4096 contexts for TLB entries


    OCR Scan     		PDF 256-Kbyte, 16-Mbyte, CY7CG04 CY7C604A TAG scr Selection Guide CY7C604

    7C602

    Abstract: CY7C601
    Text: CY7C602A CYPRESS SEMICONDUCTOR Features • Direct interface to CY7C601 integer unit • Direct interface to CY7C157 Cache Storage Unit CSU • FullcompliancewithANSI/IEEE-754 standard for binary floating-point arithmetic • Supports single and double precision


    OCR Scan     		PDF CY7C602A CY7C601 CY7C157 FullcompliancewithANSI/IEEE-754 64-bit 32-bit 144-pin 7C602

    CY7C157A

    Abstract: No abstract text available
    Text: CY7C601A CYPRESS SEMICONDUCTOR 32-Bit RISC Processor — Registers can be used as eight win­ dows of 24 registers each for low procedure overhead — Registers can also be used as regis­ ter banks for fast context switching Features • Reduced Instruction Set Computer


    OCR Scan     		PDF CY7C601A 40-MHz 32-bit 207-pin CY7C601 CY7C601Achip. CY7C157A

    Cy7C601

    Abstract: CY7C605 c5wg
    Text: 4t.E D CYPRESS SEMICONDUCTOR El H S Ö i L b a 0 0 0 7 4 0 4 S S3 CYP CY7C605A -_-ra ¿rar y — zr^r CYPRESS SEMICONDUCTOR Features Cache Controller and Memory Management Unit Fully conforms to the SPARC refer­ ence M emory M anagement Unit M M U architecture


    OCR Scan     		PDF CY7C605A CY7C605A CY7C604A, CY7C604A. CY7C605 Cy7C601 c5wg

    Cy7C601

    Abstract: STD-745-1985 cy7c601a
    Text: CY7C602A CYPRESS SEMICONDUCTOR Features • Direct interface to CY7C601 integer unit • Direct interface to CY7C157 Cache Storage Unit CSU • Full compliance with ANSI/IEEE-754 standard for binary floating-point arithmetic • Supports single and double precision


    OCR Scan     		PDF CY7C602A CY7C601 CY7C157 ANSI/IEEE-754 64-bit 32-bit 144-pin CY7C602A STD-745-1985 cy7c601a

    CY7C157A

    Abstract: No abstract text available
    Text: CY7C611A CYPRESS SEMICONDUCTOR Features • SPARC processor optimized for em ­ bedded control applications 32-Bit RISC Controller — Privileged instructions • 136 32-bit registers — Eight overlapping windows o f 24 registers each • Artificial intelligence support


    OCR Scan     		PDF CY7C611A 40-ns 240-ns 32-bit 24-bit 7C611A CY7C61 CY7C157A