CY7C2170KV18 Search Results
CY7C2170KV18 Price and Stock
Infineon Technologies AG CY7C2170KV18-400BZCIC SRAM 18MBIT PARALLEL 165FBGA |
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CY7C2170KV18-400BZC | Tray |
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Rochester Electronics LLC CY7C2170KV18-400BZCIC SRAM 18MBIT PARALLEL 165FBGA |
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CY7C2170KV18-400BZC | Tray | 8 |
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Infineon Technologies AG CY7C2170KV18-400BZXCIC SRAM 18MBIT PARALLEL 165FBGA |
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CY7C2170KV18-400BZXC | Tray | 680 |
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CY7C2170KV18-400BZXC | Tray | 0 Weeks, 2 Days | 22 |
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FLIP ELECTRONICS CY7C2170KV18-400BZXCIC SRAM 18MBIT PARALLEL 165FBGA |
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CY7C2170KV18-400BZXC | Tray | 20 |
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Infineon Technologies AG CY7C2170KV18-550BZXCIC SRAM 18MBIT PAR 165FBGA |
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CY7C2170KV18-550BZXC | Tray |
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CY7C2170KV18-550BZXC | Tray | 111 Weeks | 136 |
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CY7C2170KV18 Datasheets (3)
Part | ECAD Model | Manufacturer | Description | Curated | Datasheet Type | PDF Size | Page count | |
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CY7C2170KV18-400BZC |
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Integrated Circuits (ICs) - Memory - IC SRAM 18M PARALLEL 165FBGA | Original | 630.83KB | ||||
CY7C2170KV18-400BZXC |
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Integrated Circuits (ICs) - Memory - IC SRAM 18M PARALLEL 165FBGA | Original | 630.83KB | ||||
CY7C2170KV18-550BZXC |
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Integrated Circuits (ICs) - Memory - IC SRAM 18M PARALLEL 165FBGA | Original | 630.83KB |
CY7C2170KV18 Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: CY7C2168KV18/CY7C2170KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture 2.5 Cycle Read Latency with ODT 18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features Configurations • 18-Mbit density (1 M x 18, 512 K × 36) |
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CY7C2168KV18/CY7C2170KV18 18-Mbit 550-MHz CY7C2168KV18 CY7C2170KV18 | |
3M Touch SystemsContextual Info: CY7C2168KV18, CY7C2170KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture 2.5 Cycle Read Latency with ODT 18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features Configurations • 18-Mbit density (1 M x 18, 512 K × 36) |
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CY7C2168KV18, CY7C2170KV18 18-Mbit CY7C2168KV18 550-MHz 3M Touch Systems | |
Contextual Info: CY7C2168KV18, CY7C2170KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture 2.5 Cycle Read Latency with ODT 18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features Configurations • 18-Mbit density (1 M x 18, 512 K × 36) |
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CY7C2168KV18, CY7C2170KV18 18-Mbit 550-MHz CY7C2168KV18 | |
3M Touch SystemsContextual Info: CY7C2166KV18, CY7C2177KV18 CY7C2168KV18, CY7C2170KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture 2.5 Cycle Read Latency with ODT Features Configurations • 18 Mbit density (2 M x 8, 2 M x 9, 1 M x 18, 512 K x 36) With Read Cycle Latency of 2.5 cycles: |
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CY7C2166KV18, CY7C2177KV18 CY7C2168KV18, CY7C2170KV18 18-Mbit 550-MHz CY7C2166KV18 3M Touch Systems | |
CY7C2168KV18
Abstract: CY7C2170KV18 3M Touch Systems
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CY7C2168KV18, CY7C2170KV18 18-Mbit CY7C2168KV18 550-MHz CY7C2168KV18 CY7C2170KV18 3M Touch Systems | |
3M Touch SystemsContextual Info: CY7C2166KV18, CY7C2177KV18 CY7C2168KV18, CY7C2170KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture 2.5 Cycle Read Latency with ODT 18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features Configurations • 18-Mbit density (2 M x 8, 2 M × 9, 1 M × 18, 512 K × 36) |
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CY7C2166KV18, CY7C2177KV18 CY7C2168KV18, CY7C2170KV18 18-Mbit CY7C2166KV18 CY7C2177KV18 CY7C2168KV18 3M Touch Systems |