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    Infineon Technologies AG CYD18S36V18-167BBAI

    IC SRAM 18MBIT PAR 256FBGA
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    Infineon Technologies AG CYD18S36V18-200BBAXI

    IC SRAM 18MBIT PARALLEL 256FBGA
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    CYD18S36V18 Datasheets (9)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CYD18S36V18 Cypress Semiconductor 18-Mb/9-Mb/4-Mb x36/x18 FullFlex Dual-Ports Original PDF
    CYD18S36V18-167BBAI Cypress Semiconductor FullFlex Synchronous SDR Dual Port SRAM Original PDF
    CYD18S36V18-167BBAI Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 18MBIT 167MHZ 256FBGA Original PDF
    CYD18S36V18-167BBI Cypress Semiconductor IC SRAM CHIP SYNCH DUAL 1.8V 16MBIT 512KX32 Original PDF
    CYD18S36V18-200BBAXI Cypress Semiconductor FullFlex Synchronous SDR Dual Port SRAM; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V; Speed: 200 MHz Original PDF
    CYD18S36V18-200BBAXI Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 18MBIT 200MHZ 256FBGA Original PDF
    CYD18S36V18-200BBC Cypress Semiconductor IC SRAM CHIP SYNCH DUAL 1.8V 16MBIT 512KX32 3. Original PDF
    CYD18S36V18-200BBI Cypress Semiconductor IC SRAM CHIP SYNCH DUAL 1.8V 16MBIT 512KX32 3. Original PDF
    CYD18S36V18-250BBC Cypress Semiconductor IC SRAM CHIP SYNCH DUAL 1.8V 16MBIT 512KX32 2. Original PDF

    CYD18S36V18 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    BE5L

    Abstract: CYD18S18V18 CYD09S36V18 CYD18S36V18 SKR 175 FullFlex36
    Text: FullFlex FullFlex Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access to the shared array from each port ■ Synchronous pipelined operation with Single Data Rate SDR operation on each port


    Original
    PDF

    FullFlex36

    Abstract: No abstract text available
    Text: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR


    Original
    PDF CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 18-Mbit, 36-Mbit FullFlex72 72-bit FullFlex36

    FullFlex36

    Abstract: No abstract text available
    Text: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR


    Original
    PDF CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 18-Mbit, 36-Mbit FullFlex72 72-bit FullFlex36

    FullFlex36

    Abstract: CYDXXS36V18 400 OHM RESISTOR DQ67
    Text: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR


    Original
    PDF CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 18-Mbit, 36-Mbit FullFlex72 72-bit FullFlex36 400 OHM RESISTOR DQ67

    CYD18S18V18

    Abstract: FullFlex36 CYD09S36V18 CYD18S36V18 ARRAY VCSEL
    Text: PRELIMINARY FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with SDR operation on each port — Single Data Rate SDR interface at 250 MHz


    Original
    PDF 36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) FullFlex36 FullFlex18 CYD18S18V18 CYD09S36V18 CYD18S36V18 ARRAY VCSEL

    FullFlex36

    Abstract: No abstract text available
    Text: PRELIMINARY FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with Single Data Rate SDR operation on each port — SDR interface at 250 MHz


    Original
    PDF 36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) 18-Mbit: CYD18S72V18) CYD09S72V18) CYD04S72V18) FullFlex36

    TMS 1070 NL

    Abstract: BE5L NA820 str 350-430 FullFlex36 CYD04S18V18 CYD36S18V18-133BGI CYD36S36V18-133BGI CYD36S72V18-133BGI tca 780
    Text: FullFlex FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with Single Data Rate SDR operation on each port — SDR interface at 250 MHz


    Original
    PDF 36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) 36Mx72 TMS 1070 NL BE5L NA820 str 350-430 FullFlex36 CYD04S18V18 CYD36S18V18-133BGI CYD36S36V18-133BGI CYD36S72V18-133BGI tca 780

    FullFlex36

    Abstract: No abstract text available
    Text: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR


    Original
    PDF CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 72-bit 484-ball 256-ball FullFlex36

    FullFlex36

    Abstract: No abstract text available
    Text: FullFlex PRELIMINARY FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with SDR operation on each port — Single Data Rate SDR interface at 250 MHz


    Original
    PDF 36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) 18-Mbit: CYD18S72V18) CYD09S72V18) CYD04S72V18) FullFlex36

    FullFlex36

    Abstract: TMS 1070 NL
    Text: FullFlex FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with Single Data Rate SDR operation on each port — SDR interface at 250 MHz


    Original
    PDF 36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) 18-Mbit: CYD18S72V18) CYD09S72V18) CYD04S72V18) FullFlex36 TMS 1070 NL

    FullFlex36

    Abstract: DQ67L CYD18S72V18
    Text: FullFlex FullFlexTM Synchronous SDR Dual Port SRAM FullFlex Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access to the shared array from each port ■ Synchronous pipelined operation with single data rate SDR


    Original
    PDF 18-Mbit, 36-Mbit FullFlex72 72-bit FullFlex36 DQ67L CYD18S72V18

    FullFlex36

    Abstract: CYD04S36V18 CYD09S36V18 CYD18S18V18 CYD18S36V18
    Text: FullFlex FullFlexTM Synchronous SDR Dual Port SRAM FullFlex Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access to the shared array from each port ■ Synchronous pipelined operation with single data rate SDR


    Original
    PDF 72-bit 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) 18-Mbit: CYD18ation FullFlex36 CYD04S36V18 CYD09S36V18 CYD18S18V18 CYD18S36V18

    FullFlex36

    Abstract: No abstract text available
    Text: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR


    Original
    PDF CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 72-bit 18-Mbit, 36-Mbit FullFlex36

    CYD18S18V18-200BBAXI

    Abstract: FullFlex36 CYD36S18V18-167BGXI
    Text: FullFlex FullFlex Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access to the shared array from each port ■ Synchronous pipelined operation with single data rate SDR operation on each port


    Original
    PDF FullFlex72 72-bit CYD18S18V18-200BBAXI FullFlex36 CYD36S18V18-167BGXI

    FullFlex36

    Abstract: CYD09S36V18 CYD18S18V18 CYD18S36V18
    Text: FullFlex FullFlexTM Synchronous SDR Dual Port SRAM FullFlex Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR


    Original
    PDF 72-bit 18-Mbit, 36-Mbit FullFlex36 CYD09S36V18 CYD18S18V18 CYD18S36V18

    TMS 1070 NL

    Abstract: CYD09S18V18-167BBXC CYD09S36V18 CYD18S36V18 CYD04S18V18-200BBXC FullFlex36
    Text: FullFlex FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with Single Data Rate SDR operation on each port — SDR interface at 250 MHz


    Original
    PDF 36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) 36Mx72 TMS 1070 NL CYD09S18V18-167BBXC CYD09S36V18 CYD18S36V18 CYD04S18V18-200BBXC FullFlex36

    CYD04S18V18-200BBXC

    Abstract: A20l cqe vco CYD18S36V18-200BBXI TMS 1070 NL FullFlex36
    Text: FullFlex FullFlex Synchronous SDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with Single Data Rate SDR operation on each port — SDR interface at 250 MHz


    Original
    PDF 36-Gb/s 484-ball 256-ball FullFlex72 36-Mbit: CYD36S72V18) 18-Mbit: CYD18S72V18) CYD09S72V18) CYD04S72V18) CYD04S18V18-200BBXC A20l cqe vco CYD18S36V18-200BBXI TMS 1070 NL FullFlex36