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    Q1B-Q13B

    Abstract: SSTV16859
    Text: Revised March 2001 SSTV16859 Dual Output 13-Bit Register with SSTL-2 Compatible I/O and Reset General Description Features The SSTV16859 is a dual output 13-bit register designed for use with 184 and 232 pin DDR-1 memory modules. The device has a differential input clock, SSTL-2 compatible


    Original     		PDF SSTV16859 13-Bit Q1B-Q13B

    SSTV16859

    Abstract: No abstract text available
    Text: Revised August 2001 SSTV16859 Dual Output 13-Bit Register with SSTL-2 Compatible I/O and Reset General Description Features The SSTV16859 is a dual output 13-bit register designed for use with 184 and 232 pin DDR-1 memory modules. The device has a differential input clock, SSTL-2 compatible


    Original     		PDF SSTV16859 13-Bit

    rand

    Abstract: LTC2206IUK-14 LC2207-14 LTC2204 LTC2205-14 LTC2206 LTC2206-14 LTC2207 LTC2207-14
    Text: LTC2207-14/LTC2206-14 14-Bit, 105Msps/80Msps ADCs DESCRIPTIO U FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Sample Rate: 105Msps/80Msps 77.3dBFS Noise Floor 98dB SFDR SFDR >82dB at 250MHz 1.5VP-P Input Range PGA Front End (2.25VP-P or 1.5VP-P Input Range)


    Original     		PDF LTC2207-14/LTC2206-14 14-Bit, 105Msps/80Msps 250MHz 25VP-P 700MHz 947mW/762mW 105Msps: LTC2207 rand LTC2206IUK-14 LC2207-14 LTC2204 LTC2205-14 LTC2206 LTC2206-14 LTC2207 LTC2207-14

    LTC2206CUK-14

    Abstract: LTC2206IUK-14 pin diagram of 0809 adc LTC2204 LTC2205-14 LTC2206 LTC2206-14 LTC2207 LTC2207-14 adc 0809 free
    Text: LTC2207-14/LTC2206-14 14-Bit, 105Msps/80Msps ADCs DESCRIPTIO U FEATURES n n n n n n n n n n n n n n Sample Rate: 105Msps/80Msps 77.3dBFS Noise Floor 98dB SFDR SFDR >82dB at 250MHz 1.5VP-P Input Range PGA Front End (2.25VP-P or 1.5VP-P Input Range) 700MHz Full Power Bandwidth S/H


    Original     		PDF LTC2207-14/LTC2206-14 14-Bit, 105Msps/80Msps 250MHz 25VP-P 700MHz 947mW/762mW 105Msps: LTC2207 LTC2206CUK-14 LTC2206IUK-14 pin diagram of 0809 adc LTC2204 LTC2205-14 LTC2206 LTC2206-14 LTC2207 LTC2207-14 adc 0809 free

    LTC1461

    Abstract: LTC2205IUK-14#PBF LTC2204 LTC2205-14 LTC2206 LTC2206-14 LTC2207 LTC2207-14
    Text: LTC2205-14 14-Bit, 65Msps ADC FEATURES DESCRIPTION n The LTC 2205-14 is a sampling 14-bit A/D converter designed for digitizing high frequency, wide dynamic range signals up to input frequencies of 700MHz. The input range of the ADC can be optimized with the PGA front end.


    Original     		PDF LTC2205-14 14-Bit, 65Msps 14-bit 700MHz. 65Msps 25VP-P 140MHz 700MHz LTC1461 LTC2205IUK-14#PBF LTC2204 LTC2205-14 LTC2206 LTC2206-14 LTC2207 LTC2207-14

    C7110

    Abstract: MSC7110-01 MSC7112-01 QFP44-P-910-0 C7112-01 b1517 4 digit 7 segment display 28 pin configuration
    Text: E2C0028-27-Y4 ¡ Semiconductor MSC7110-01/7112-01 ¡ Semiconductor ThisMSC7110-01/7112-01 version: Nov. 1997 Previous version: Jul. 1996 12-Segment ¥ 16-Digit or 16-Segment ¥ 12-Digit Display Controller/Driver GENERAL DESCRIPTION The MSC7110-01/MSC7112-01 is a display controller to display the timer of video tape recorder,


    Original     		PDF E2C0028-27-Y4 MSC7110-01/7112-01 12-Segment 16-Digit 16-Segment 12-Digit MSC7110-01/MSC7112-01 QFP44-P-910-0 C7110 MSC7110-01 MSC7112-01 C7112-01 b1517 4 digit 7 segment display 28 pin configuration

    DB9 pin configuration

    Abstract: LTC2208C-14 LTC2208 LTC2208-14 LTC6600-20
    Text: LTC2208-14 14-Bit, 130Msps ADC FEATURES DESCRIPTION n The LTC 2208-14 is a 130Msps, sampling 14-bit A/D converter designed for digitizing high frequency, wide dynamic range signals with input frequencies up to 700MHz. The input range of the ADC can be optimized


    Original     		PDF LTC2208-14 14-Bit, 130Msps 130Msps, 14-bit 700MHz. 130Msps 250MHz 25VP-P 700MHz DB9 pin configuration LTC2208C-14 LTC2208 LTC2208-14 LTC6600-20

    Untitled

    Abstract: No abstract text available
    Text: LTC2207-14/LTC2206-14 14-Bit, 105Msps/80Msps ADCs DESCRIPTIO FEATURES n n n n n n n n n n n n n U n Sample Rate: 105Msps/80Msps 77.3dBFS Noise Floor 98dB SFDR SFDR >82dB at 250MHz 1.5VP-P Input Range PGA Front End (2.25VP-P or 1.5VP-P Input Range) 700MHz Full Power Bandwidth S/H


    Original     		PDF LTC2207-14/LTC2206-14 14-Bit, 105Msps/80Msps 250MHz 25VP-P 700MHz 947mW/762mW 105Msps: LTC2207

    Untitled

    Abstract: No abstract text available
    Text: LTC2205-14 14-Bit, 65Msps ADC DESCRIPTION FEATURES n n n n n n n n n n n n n Sample Rate: 65Msps 78.3dB SNR and 98dB SFDR 2.25VP-P Range SFDR >90dB at 140MHz (1.5VP-P Input Range) PGA Front End (2.25VP-P or 1.5VP-P Input Range) 700MHz Full Power Bandwidth S/H


    Original     		PDF LTC2205-14 14-Bit, 65Msps 65Msps 25VP-P 140MHz 700MHz 600mW 105Msps:

    oki C7112-01

    Abstract: C7112-01 Digital Pulse Counter Two Digit MSC7110-01 MSC7112-01 MSC7112-01SS QFP44-P-910-0 b1517
    Text: Dear customers, About the change in the name such as "Oki Electric Industry Co. Ltd." and "OKI" in documents to OKI Semiconductor Co., Ltd. The semiconductor business of Oki Electric Industry Co., Ltd. was succeeded to OKI Semiconductor Co., Ltd. on October 1, 2008.


    Original     		PDF

    SSTV16859

    Abstract: No abstract text available
    Text: Preliminary Revised February 2001 SSTV16859 Dual Output 13-Bit Register with SSTL-2 Compatible I/O and Reset Preliminary General Description Features The SSTV16859 is a dual output 13-bit register designed for use with 184 and 232 pin DDR-1 memory modules. The


    Original     		PDF SSTV16859 13-Bit SSTV16859

    SSTV16859

    Abstract: MO-205 MTD64 SSTV16859G SSTV16859MTD
    Text: Revised January 2005 SSTV16859 Dual Output 13-Bit Register with SSTL-2 Compatible I/O and Reset General Description Features The SSTV16859 is a dual output 13-bit register designed for use with 184 and 232 pin DDR-1 memory modules. The device has a differential input clock, SSTL-2 compatible


    Original     		PDF SSTV16859 13-Bit SSTV16859 MO-205 MTD64 SSTV16859G SSTV16859MTD

    MSC7112-01

    Abstract: oki C7112-01 Digital Pulse Counter Two Digit MSC7110-01 MSC7112-01SS QFP44-P-910-0 C7112-01
    Text: FEDL7110-03 ¡ Semiconductor MSC7110-01/7112-01 ¡ Semiconductor FEDL7110-03 This version: Sep. 2000 MSC7110-01/7112-01 Previous version: Nov. 1997 12-Segment ¥ 16-Digit or 16-Segment ¥ 12-Digit Display Controller/Driver GENERAL DESCRIPTION The MSC7110-01/MSC7112-01 is a display controller to display the timer of video tape recorder,


    Original     		PDF FEDL7110-03 MSC7110-01/7112-01 12-Segment 16-Digit 16-Segment 12-Digit MSC7110-01/MSC7112-01 MSC7112-01 oki C7112-01 Digital Pulse Counter Two Digit MSC7110-01 MSC7112-01SS QFP44-P-910-0 C7112-01

    ltc146

    Abstract: LTC1461 LTC2204 LTC2205-14 LTC2206 LTC2206-14 LTC2207 LTC2207-14 LTC6600-20
    Text: LTC2205-14 14-Bit, 65Msps ADC U DESCRIPTIO FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Sample Rate: 65Msps 78.3dB SNR and 98dB SFDR 2.25VP-P Range SFDR >90dB at 140MHz (1.5VP-P Input Range) PGA Front End (2.25VP-P or 1.5VP-P Input Range)


    Original     		PDF LTC2205-14 14-Bit, 65Msps 65Msps 25VP-P 140MHz 700MHz 600mW 105Msps: ltc146 LTC1461 LTC2204 LTC2205-14 LTC2206 LTC2206-14 LTC2207 LTC2207-14 LTC6600-20

    SN74ABT3611

    Abstract: mdv 434
    Text: SN74ABT3611 64 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SC B S 127C - JULY 1992 - RE V IS E D A P R IL 1994 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Empty Flag EF and Almost-Empty Flag (AE) Synchronized by CLKB 64 x 36 Clocked FIFO Buffering Data From


    OCR Scan     		PDF SN74ABT3611 SCBS127C 120-Pin 132-Pin Cibl723 762G5 SN74ABT3611 mdv 434

    D784038, 784038Y Sub-Series User’s Manual

    Abstract: D784038
    Text: MOS INTEGRATED CIRCUIT ¿1P D 7 8 4 0 3 5 , 7 8 4 0 3 6 , 7 8 4 0 3 7 , 7 8 4 0 3 8 16/8-BIT SINGLE-CHIP MICROCOMPUTER T h e /J P D 7 8 4 0 3 8 is a p ro d u c t o f th e ,u P D 7 8 4 0 3 8 s u b -s e r ie s in th e 7 8 K /IV s e rie s . It c o n ta in s v a rio u s p e rip h e ra l


    OCR Scan     		PDF 16/8-BIT 78K/IV X78K4 IEI-635 IEI-1213 l-1207 El-620 l-1209 IEM-5068 EI-603 D784038, 784038Y Sub-Series User’s Manual D784038

    43b transistor

    Abstract: No abstract text available
    Text: <8 M O T O R O LA — UC3842B, 43B U C 2842B ,43B High Performance Current Mode Controllers The UC3842B, UC3843B series are high performance fixed frequency current mode controllers. They are specifically designed for O ff-Line and d c -to -d c converter applications offering the designer a cost-effective


    OCR Scan     		PDF UC3842B, 2842B UC3843B EC35-3C8 EC35PCB1 43b transistor

    TL780-05C

    Abstract: No abstract text available
    Text: g M O T O R O L A TL780 Series Three-Term inal Positive Fixed Voltage Regulators This family of precision fixed voltage regulators are monolithic integrated circuits capable of driving loads in excess of 1.5 A. Innovative design concepts, coupled with advanced thermal layout techniques have resulted in


    OCR Scan     		PDF TL780 b3b7253 D1D13S3 TL780-05C

    Untitled

    Abstract: No abstract text available
    Text: E2C0028-27-Y4 O K I Semiconductor MSC7110-01/7112-01 Previous version: Jul. 1996 ~ 12-Segment x 16-Digit or 16-Segment x 12-Digit Display Controller/Driver GENERAL DESCRIPTION TheMSC7110-01 /M SC7112-01 is a display controller to display the timer of video tape recorder,


    OCR Scan     		PDF E2C0028-27-Y4 MSC7110-01/7112-01 12-Segment 16-Digit 16-Segment 12-Digit TheMSC7110-01 SC7112-01

    SN74ACT7803

    Abstract: SN74ACT7805 SN74ACT7813
    Text: SN74ACT7805 256 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS201 - MARCH 1991 - R E V IS E D APRIL 1992 D LPACKAGE TOP VIEW • Member of the Texas Instruments Widebus7" Family • Free-Running Read and Write Clocks Can Be Asynchronous or Coincident • Read and Write Operations Synchronized


    OCR Scan     		PDF SN74ACT7805 SCAS201 50-pF SN74ACT7803 SN74ACT7805 SN74ACT7813

    Untitled

    Abstract: No abstract text available
    Text: MITEL MT3170B/71B, MT3270B/71B, MT3370B/71B Wide Dynamic Range DTMF Receiver Features ISSUE 2 W ide dynam ic range 50dB DTMF Receiver May 1995 O rdering Inform ation Call progress (CP) detection via cadence indication MT3170/71 BE 8 Pin Plastic DIP MT3270/71 BE


    OCR Scan     		PDF MT3170B/71B, MT3270B/71B, MT3370B/71B MT3x70B T3x71B T317xB MT337xB) 194304M T337xB MT327xB)

    SUPI 3

    Abstract: E20A LM6164 LM6264N LM6364N W10A 0101334
    Text: LM6164/LM6264/LM6364 High Speed Operational Amplifier General Description Features The LM6164 family o f high-speed amplifiers exhibits an ex­ cellent speed-power product In delivering 300V per ¡ms and 175 MHz GBW stable down to gains as tow as + 5 with


    OCR Scan     		PDF LM6164/LM6264/LM6364 LM6164 B0-530 01D134D SUPI 3 E20A LM6264N LM6364N W10A 0101334

    api 4st 03

    Abstract: qld133b A10C A12C A14C A15C IC51-1324-828 SN74ABT3612 B1494
    Text: SN74ABT3612 64 x 36 x 2 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCBS129D - JULY 1992 - REVISED JANUARY 1994 EFB, FFB, AEB, and AFB Flags Synchronized by CLKB Passive Parity Checking on Each Port Parity Generation Can Be Selected for Each Port Low-Power Advanced BiCMOS Technology


    OCR Scan     		PDF SN74ABT3612 36-bit 01d1355 65s303 api 4st 03 qld133b A10C A12C A14C A15C IC51-1324-828 B1494

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY PRODUCT INFORMATION MOS INTEGRATED CIRCUIT juPD784035Y,784036Y,784037Y,784038Y 16/8-BIT SINGLE-CHIP MICROCONTROLLERS The /uPD784038Y is based on the ¿zPD784038 with an l2C bus control function appended, and is ideal for applications in audio-visual.


    OCR Scan     		PDF juPD784035Y 784036Y 784037Y 784038Y 16/8-BIT /uPD784038Y zPD784038 PD78P4038Y, //PD784038, 784038Y