DDD24S5 Search Results

Contextual Info: QS5930 PRELIMINARY u Low Skew CMOS PLL Clock Driver with Integrated Loop Filter / I QS5930-50T QS5930-66T QS5930-75T FEATURES • • • • • Q/2 output, 5 Q outputs Outputs tri-state and reset while OE LOW Internal loop filter RC network Low noise TTL level outputs