DDU7F100ME5 Search Results

Contextual Info: iasi Logic Digital Delay Units SERIES: 10 Taps 14 pins DIP TTL Interfaced DDU-7F deteyW data y » » devicesYinc. Features: • ■ ■ ■ ■ Test Conditions: Auto-insertable. Com pletely interfaced for TTL No external com ponents required P.C. board space econom y achieved

DDU7

Contextual Info: zFast Logic data delay devicesYinc. Digital Delay Units S ER IES : 10 Taps 14 pins DIP T T L Interfaced DDU-7 F Features: • ■ ■ ■ ■ A u to -in sertab le. C o m p le te ly in terfa ce d for TT L No e xtern a l c o m p o n e n ts req uired P.C. board space e co n o m y ach ieved

Contextual Info: ïF a s t Logic data V ^/ delayW devices^Inc. Digital Delay Units S ER IES : 10 Taps 14 pins DIP T T L Interfaced DDU-7F Features: • ■ ■ ■ ■ Auto-insertable. Com pletely interfaced for TTL No external com ponents required P.C. board space econom y achieved

DDU7F100ME5

Abstract: DDU7F500
Contextual Info: iasi Log ic Digital Delay Units SER IES : 10 Taps 14 pins DIP T T L Interfaced DDU-7F data w3^ / delay devicesVinc. Features: • ■ ■ ■ ■ Test Conditions: Auto-insertable. Com pletely interfaced for TTL No external com ponents required P.C. board space economy achieved

7F25

Abstract: DDU7F100ME5
Contextual Info: ìF a st Logic Digital Delay Units SERIES: 10 Taps 14 pins DIP TTL Interfaced DDU-7F Features: • ■ ■ ■ ■ Auto-insertable. Com pletely interfaced for TTL No external com ponents required P.C. board space econom y achieved Fits standard 14 pins DIP socket

Contextual Info: 7 a s f Logic dataV^ / Digital Delay Units delay \ê 10 Taps 14 pins DIP) devices^. S ER IES: DDU-7F T T L Interfaced Features: • ■ ■ ■ ■ A u to -in sertab le. C o m p le te ly in terfa ce d for TT L N o e x tern a l c o m p o n e n ts req uired

Contextual Info: data delay devicesV ïF a sf L o g ic Digital Delay Units S ER IES : 10 Taps 14 pins DIP T T L Interfaced DDU-7 F inc. Features: • ■ ■ ■ ■ Auto-insertable. Com pletely interfaced for TTL No external com ponents required P.C. board space econom y achieved