DELAY LINE 500NS Search Results

74LS04 Hex Inverter definition

Abstract: 74ls04 dip ttl cmos advantages disadvantages 74LS04 DS-1100 Appnote14 TTL 74ls04 data DS1005 DS1100 DS1110
Contextual Info: Maxim > App Notes > Oscillators/Delay Lines/Timers/Counters Keywords: DS1100, DS1135, DS1110, delay line, hybrid delay line, digital delay line, FAQ Sep 30, 2002 APPLICATION NOTE 14 Design Considerations for All-Silicon Delay Lines Abstract: This application brief discusses the architectural and structural differences between solid-state and

delay line 100ns

Abstract: AN229 programmable delay DS1013 DS1020 DS1021 DS1023 DS1040 DS1045 DS1135
Contextual Info: Application Note 229 Delay Lines Comparison www.maxim-ic.com INTRODUCTION Dallas Semiconductor manufactures several delay lines. This application note compares each programmable delay line and non-programmable delay line to help customers choose the appropriate device for their

DS1110

Abstract: DS1110L DS1110LE-100 DS1110LE-125 DS1110LE-150 DS1110LE-175 DS1110LE-200 DS1110LE-250 DS1110LE-300 DS1110LE-350
Contextual Info: XX-XXXX; Rev 0; 5/02 3V 10-Tap Silicon Delay Line The DS1110L 10-tap delay line is a 3V version of the DS1110. It has 10 equally spaced taps providing delays from 10ns to 500ns. The DS1110L series delay lines provide a nominal accuracy of ±5% or ±2ns, whichever

tssop 173mil

Contextual Info: XX-XXXX; Rev 1; 11/03 3V 10-Tap Silicon Delay Line The DS1110L 10-tap delay line is a 3V version of the DS1110. It has 10 equally spaced taps providing delays from 10ns to 500ns. The DS1110L series delay lines provide a nominal accuracy of ±5% or ±2ns, whichever

56-G2015-000B

Contextual Info: XX-XXXX; Rev 1; 11/03 3V 10-Tap Silicon Delay Line The DS1110L 10-tap delay line is a 3V version of the DS1110. It has 10 equally spaced taps providing delays from 10ns to 500ns. The DS1110L series delay lines provide a nominal accuracy of ±5% or ±2ns, whichever

Contextual Info: XX-XXXX; Rev 1; 11/03 3V 10-Tap Silicon Delay Line The DS1110L 10-tap delay line is a 3V version of the DS1110. It has 10 equally spaced taps providing delays from 10ns to 500ns. The DS1110L series delay lines provide a nominal accuracy of ±5% or ±2ns, whichever

DS1110LE-200

Abstract: DS1110LE-250 DS1110LE-300 DS1110LE-350 DS1110 DS1110L DS1110LE-100 DS1110LE-125 DS1110LE-150 DS1110LE-175
Contextual Info: XX-XXXX; Rev 1; 11/03 3V 10-Tap Silicon Delay Line The DS1110L 10-tap delay line is a 3V version of the DS1110. It has 10 equally spaced taps providing delays from 10ns to 500ns. The DS1110L series delay lines provide a nominal accuracy of ±5% or ±2ns, whichever

Contextual Info: ACTIVE DIGITAL DELAY LINES SERIES A01 - SINGLE DELAY SERIES A03 - TRIPLE DELAY • ■ ■ ■ ■ Economical cost, prompt delivery! Wide varieties of values, 10nS to 500nS TTL compatible Operating temperature: 0°C to 70°C New! Single output SIP delay line now available

Digital Delay Lines

Contextual Info: *% % ACTIVE DIGITAL DELAY LINES SERIES A01 - SINGLE DELAY SERIES A03 - TRIPLE DELAY • ■ ■ ■ ■ Economical cost, prompt delivery! Wide varieties of values, 10nS to 500nS TTL compatible Operating temperature: 0 °C to 70°C New! Single output SIP delay line now available

Digital Delay Lines

Contextual Info: ACTIVE DIGITAL DELAY LINES SERIES A01 - SINGLE DELAY SERIES A03 - TRIPLE DELAY • ■ ■ ■ ■ Economical cost, prompt delivery! Wide varieties of values, 10nS to 500nS TTL compatible Operating temperature: 0 °C to 70°C New! Single output SIP delay line now available

4SO16

Abstract: 74FO4 74LS Series IC list DS1110-500 DS1110-50 74LS DS1010 DS1110 DS1110E J-STD-020A
Contextual Info: Rev 1; 11/03 10-Tap Silicon Delay Line The DS1110 delay line is an improved replacement for the DS1010. It has ten equally spaced taps providing delays from 5ns to 500ns. The devices are offered in a standard 16-pin SO or 14-pin TSSOP. The DS1110 series delay lines provide a nominal accuracy of ±5% or ±2ns,

DS1110-500

Abstract: 74LS DS1010 DS1110 DS1110E J-STD-020A
Contextual Info: Rev 0; 6/02 10-Tap Silicon Delay Line The DS1110 delay line is an improved replacement for the DS1010. It has ten equally spaced taps providing delays from 5ns to 500ns. The devices are offered in a standard 14-pin DIP, 16-pin SO, or 14-pin TSSOP. The DS1110 series delay lines provide a nominal accuracy of

83A200

Contextual Info: Yuan Dean Scientific CO.,LTD 83A SERIES 16 PIN DUAL –IN-LINE ECL 10K DIGTAL DELAY LINE FEATURES • • • • • STANDARD 16-PIN PACKAGE. 5 EQUALLY SPACED DELAY TAPS. ECL 10K INTERFACED. DELAYS FROM 10ns-500ns POWER DISSIPATIPN:200mW TYP. NO LOAD ELECTRICAL CHARACTERISTICS

83A300

Contextual Info: 16 PIN DUAL –IN-LINE ECL 10K DIGTAL DELAY LINE 83A SERIES FEATURES • STANDARD 16-PIN PACKAGE. • 5 EQUALLY SPACED DELAY TAPS. • ECL 10K INTERFACED. • DELAYS FROM 10ns-500ns • POWER DISSIPATIPN:200mW TYP. NO LOAD ELECTRICAL CHARACTERISTICS IIH Logic”1” Input Current

delay line 400ns

Abstract: 80T5400 80T5250 8T50
Contextual Info: ALLEN A V IO N IC S, INC. 80T CASE TYPE 5 TAP ACTIVE DELAY LINE 80G CASE TYPE 1 TAP ACTIVE DELAY LINE SPECIFICATIONS: Supply voltage: Delay tolerances: MECHANIC: 5.0 VDC ± 10% ± 2ns or ± 5% whichever is greater Rise Time: 4ns max • Operating temp.range:0 X to + 7 0 ”C

5mm RGB led 4 pin

Abstract: 24 leads qfn 5x5 analog delay line VSP D2 TB347 EL9115 ISL59920 ISL59920IRZ ISL59920IRZ-T7
Contextual Info: ISL59920 Data Sheet December 19, 2008 Triple Analog Video Delay Line Features The ISL59920 ia a triple analog delay line that provides skew compensation between three high-speed signals. These parts are ideal for compensating for the skew introduced by

TV2118

Contextual Info: STV2180 BASE BAND CHROMA DELAY LINE . . . . DUAL SWITCHED CAPACITOR DELAY LINE 3MHz CLOCK DERIVED FROM 6MHz VCO LOCKED BY THE BURST GATE PULSE SAMPLE AND HOLD CIRCUITS AND LOWPASS FILTERS TO SUPPRESS THE 3MHz CLOCK RESIDUAL CLAMPED B-Y AND R-Y INPUTS OUTPUT BUFFERS

Contextual Info: ALLEN A V I O N I C S INC A LLEN A V IO N ICS, INC. 5H Z D 'T'Hl'll? 05Q5fl3fl 0000^53 =140 • 80T CASE TYPE 5 TAP ACTIVE DELAY LINE 80G CASE TYPE 1 TAP ACTIVE DELAY LINE SPECIFICATIONS: MECHANIC: • Supply voltage: • Delay tolerances: 5.0 VDC ± 10% ± 2ns or ± 5 %

2180-03

Abstract: STV2180
Contextual Info: STV2180 BASE BAND CHROMA DELAY LINE . . . . DUAL SWITCHED CAPACITOR DELAY LINE 3MHz CLOCK DERIVED FROM 6MHz VCO LOCKED BY THE BURST GATE PULSE SAMPLE AND HOLD CIRCUITS AND LOWPASS FILTERS TO SUPPRESS THE 3MHz CLOCK RESIDUAL CLAMPED B-Y AND R-Y INPUTS OUTPUT BUFFERS

stv2118

Abstract: STV2180 STV2180A
Contextual Info: STV2180A BASE BAND CHROMA DELAY LINE . . . . PRELIMINARY DATA DUAL SWITCHED CAPACITOR DELAY LINE 3MHz CLOCK DERIVED FROM 6MHz VCO LOCKED BY THE BURST GATE PULSE SAMPLE AND HOLD CIRCUITS AND LOWPASS FILTERS TO SUPPRESS THE 3MHz CLOCK RESIDUAL CLAMPED B-Y AND R-Y INPUTS

STV2118

Abstract: STV2180A
Contextual Info: STV2180A BASE BAND CHROMA DELAY LINE . . . . PRELIMINARY DATA DUAL SWITCHED CAPACITOR DELAY LINE 3MHz CLOCK DERIVED FROM 6MHz VCO LOCKED BY THE BURST GATE PULSE SAMPLE AND HOLD CIRCUITS AND LOWPASS FILTERS TO SUPPRESS THE 3MHz CLOCK RESIDUAL CLAMPED B-Y AND R-Y INPUTS

DIP14-10350

Abstract: DIP14-10110 DIP14-20110 ANI 1015 DIP14-10500 DIP-14
Contextual Info: lewprofili LUMPED CONSTANT DELAY LINE "D IP 14 series" LC delay lines are intended for use in most analog applications; they are also compatible w ith the low signal levels of TTL and ECL. These delay lines find extensive use in providing the required delay timing functions necessary in radar,

Contextual Info: ^ 7 SGS-THOMSON h7 £ STV2180A BASE BAND CHROMA DELAY LINE PRELIM IN ARY DATA • DUAL SWITCHED CAPACITOR DELAY LINE ■ 3MHz CLOCK DERIVED FROM 6MHz VCO LOCKED BY THE BURST GATE PULSE - SAMPLE AND HOLD CIRCUrTS AND LOWPASS FILTERS TO SUPPRESS THE 3MHz CLOCK RESIDUAL

3010-N

Abstract: 3010-P 3010
Contextual Info: 3010 data 3 delay devices, inc. VOLTAGE-VARIABLE DELAY LINE TR < 1ns SERIES 3010 FEATURES • • • • • • •  PACKAGE Varactor Technology Fast rise time for high frequency applications Delay continuously adjustable from 2.4ns to 3.4ns Very narrow device (SIP package)