DHRYSTONE Search Results

stm32f105xx

Abstract: STM32f1 STM32F107V stm32f105 STM32F105Rx STM32 dp83848 stm32f105 usb reference STM32F105R STM32F107Rx stm32f105 manual
Contextual Info: STM32F105xx STM32F107xx Connectivity line, ARM-based 32-bit MCU with 64/256 KB Flash, USB OTG, Ethernet, 10 timers, 2 CANs, 2 ADCs, 14 communication interfaces Features FBGA • Core: ARM 32-bit Cortex -M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1

R4000

Abstract: R4640 R4650 R4700 R5000 RM5230TM R5000 mips MIPS RM5230
Contextual Info: RM5230 Superscalar Microprocessor with 32-Bit System Bus FEATURES • Dual Issue superscalar microprocessor — 100, 133, 150 and 175 MHz operating frequencies — 210 Dhrystone2.1 MIPS — SPECInt95 3.5, SPECfp95 3.7 • System interface optimized for embedded applications

STM32F103xE

Abstract: LQPF100 FOOTPRINTS BGA64 LQFP100 LQFP48 LQFP64 STM32F103C8 STM32F103RB AN2606 STM32F103CBT6
Contextual Info: STM32F103x8 STM32F103xB Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 communication interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1

STM32 LQFP-64 footprint

Abstract: rain alarm CIRCUIT using IC 555 vfQFPn-36 footprint LQFP100 LQFP48 LQFP64 STM32F101 QFN-36 STM32F10xxx jtag
Contextual Info: STM32F101x8 STM32F101xB Medium-density access line, ARM-based 32-bit MCU with 64 or 128 KB Flash, 6 timers, ADC and 7 communication interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 36 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1 performance at 0 wait state memory

STM32F103xC

Abstract: STM32F103xC ADC1 CF 4093 N STM32F103xC boot STM32F103Rx STM32F103xE STM32F103xx STM32F103VC g717 stm32f103ve
Contextual Info: STM32F103xC STM32F103xD STM32F103xE High-density performance line ARM-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces Features FBGA • Core: ARM 32-bit Cortex -M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1

STM32F100xC

Abstract: STM32F1 STM32F100 STM32F100RC intel 8080 RM0059 stm32F100vc STM32F100RE STM32F100xD LQFP100 footprint
Contextual Info: STM32F100xC STM32F100xD STM32F100xE High-density value line, advanced ARM-based 32-bit MCU with 256 to 512 KB Flash, 16 timers, ADC, DAC & 11 comm interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 24 MHz maximum frequency, 1.25 DMIPS /MHz Dhrystone 2.1 performance

PC7448

Abstract: microprocessor DIODE 921 LGA PACKAGE thermal resistance Freescale powerpc 7448
Contextual Info: PC7448 PowerPC 7448 RISC Microprocessor Datasheet Features • • • • • • • • • • • • • • • 3000 Dhrystone 2.1 MIPS at 1.3 GHz Selectable Bus Clock 30 CPU Bus Dividers up to 28x Selectable MPx/60x Interface Voltage (1.5V; 1,8V; 2.5V)

PC8540

Abstract: microprocessor
Contextual Info: PC8540 Integrated Processor Datasheet - Preliminary Specification Features • Embedded e500 Book E-compatible Core Available up to 833 MHz • • • • • • • • • – 32-bit, Dual-issue, Superscalar, Seven-stage Pipeline – 1850 MIPS at 800 MHz Est. Dhrystone 2.1

IT 8572E

Abstract: 8572E PC8572E M21 diode Ceramic Capacitors 104 m30 "ESP"
Contextual Info: PC8572E PowerQUICC III Integrated Processor Hardware Specifications Datasheet - Preliminary Specification Features • Dual Embedded e500 Cores, Scaling up to 1.5 GHz • • • • • • • • • • • • • • • – 6897 MIPS at 1500 MHz Estimated Dhrystone 2.1

Contextual Info: PC7448 PowerPC 7448 RISC Microprocessor Datasheet Features • • • • • • • • • • • • • • • 3000 Dhrystone 2.1 MIPS at 1.3 GHz Selectable Bus Clock 30 CPU Bus Dividers up to 28x Selectable MPx/60x Interface Voltage (1.5V; 1.8V; 2.5V)

32x32 Multiplier

Contextual Info: QL903M QuickMIPS Data Sheet •••••• QuickMIPS Embedded Standard Product ESP Family Device Highlights Two Ethernet Controllers CPU Core • Two 10/100 MACs • 32-bit MIPS 4Kc processor runs up to 200 MHz (260 Dhrystone MIPS) • 1.3 Dhrystone MIPS per MHz

powerpc 7xx dhrystone

Abstract: 401B2 STA 401
Contextual Info: PowerPC FmverFil 401 xZ Em bedded Cores Optimized low-cost cores utilizing IBM Blue Logic* technology H ig h lig h ts 401 CPU • Compatible with PowerPC User Instruction Set Architecture 84 MIPS Dhrystone 2.1 @ 80M Hz 3.1 mm2, in 0.35/j CMOS process, (.27/j Lgff), three levels of metal

arbiter decoder -1996

Contextual Info: IDT79R3051/79R3052 RlSControllers IDT79R3051™, 79R3051E IDT79R3052”, 79R3052E Integrated Device Technology, Inc. FEATURES: — On-chip DMA arbiter — Bus Interface minimizes design com plexity Single clock input with 40%-60% duty cycle 35 MIPS, over 64,000 Dhrystones at 40MHz

Contextual Info: Freescale Semiconductor Data Sheet: Advance Information Document Number: MCF54455 Rev. 8, 02/2012 MCF54455 MAPBGA–256 17mm x 17mm MCF5445x ColdFire Microprocessor Data Sheet Features • Version 4 ColdFire Core with MMU and EMAC • Up to 410 Dhrystone 2.1 MIPS @ 266 MHz

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: MCF52277 Rev. 8, 09/2009 MCF52277 LQFP–176 24 mm x 24 mm MCF5227x ColdFire Microprocessor Data Sheet Features • Version 2 ColdFire® Core with EMAC • Up to 159 Dhrystone 2.1 MIPS @ 166.67 MHz

TRACE32-ICD

Abstract: 32x32 Multiplier EDK7145 SH7144F dhrystone industrial
Contextual Info: Ultra High Performance microcontrollers SH7145F Renesas’ SH7145F series offers industry’s highest CPU performance available to date. At 50MHz clock, these devices feature 65 MIPS Dhrystone, supported by the full-speed on-chip Flash memory and RAM. Combined with a comprehensive peripheral set, the SH7145F helps engineers to

EDK2377

Abstract: ISO7816-3
Contextual Info: Highly Integrated General Purpose 16-bit microcontrollers H8S/236x, H8S/237x Series A series of 33MHz, highly-integrated 16-bit microcontrollers in 128-pin and 144-pin QFP packages with embedded Flash and low-cost ROM-less option. Key Features • Very high CPU performance of 15 MIPS Dhrystone at

atmel 938

Abstract: PC7447 PC7455 PC7457 TYPE OF SRAM
Contextual Info: Features • • • • • • • • • • • • • • • • • 3000 Dhrystone 2.1 MIPS at 1.3 GHz Selectable Bus Clock 30 CPU Bus Dividers up to 28x 13 Selectable Core-to-L3 Frequency Divisors Selectable MPx/60x Interface Voltage (1.8V, 2.5V)

STM32F101XC

Abstract: STM32F1 CF 4093 N stm32f101 bootloader 4833a LQFP100 LQFP144 LQFP64 STM32F101RD STM32F101VD
Contextual Info: STM32F101xC STM32F101xD STM32F101xE High-density access line, ARM-based 32-bit MCU with 256 to 512 KB Flash, 9 timers, 1 ADC and 10 communication interfaces Features • ■ ■ ■ ■ Core: ARM 32-bit Cortex -M3 CPU – 36 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1

K1413

Abstract: MCF54454 MCF54451CVM180 MCF54452 MCF54455 MCF54450 MCF54450CVM180 MCF54450VM240 K611 J914
Contextual Info: Freescale Semiconductor Data Sheet: Advance Information Document Number: MCF54455 Rev. 6, 10/2009 MCF54455 MAPBGA–256 17mm x 17mm MCF5445x ColdFire Microprocessor Data Sheet Features • Version 4 ColdFire® Core with MMU and EMAC • Up to 410 Dhrystone 2.1 MIPS @ 266 MHz

powerpc dhrystone mips

Abstract: powerpc dhrystone dhrystone DIAB ML310 XAPP507 Diab DCC 5.2.1.0 dmips PowerPC Processor Diab DCC 5.2.1.0wabco plz
Contextual Info: Application Note: Virtex-II Pro Device R XAPP507 v1.0 July 11, 2005 Running the Dhrystone 2.1 Benchmark on a Virtex-II Pro PowerPC Processor Author: Paul Glover Summary This application note describes a working Virtex -II Pro PowerPC™ system that uses the

STM32 LQFP-64 footprint

Abstract: STM32F101x4 STM32F101C6 STM32F10x stm32f10x manual LQFP48 LQFP64 OSC32IN STM32F103 STM32F10x Flash Programming Reference Manual
Contextual Info: STM32F101x4 STM32F101x6 Low-density access line, ARM-based 32-bit MCU with 16 or 32 KB Flash, 5 timers, ADC and 4 communication interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 36 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1 performance at 0 wait state memory

STM32 LQFP-64 footprint

Abstract: STM32F10xxx reference manual vfQFPn-36 footprint AN2606 stm32 timer ai14125d STM32F101x4 stm32F101cx
Contextual Info: STM32F101x4 STM32F101x6 Low-density access line, ARM-based 32-bit MCU with 16 or 32 KB Flash, 5 timers, ADC and 4 communication interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 36 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1 performance at 0 wait state memory

STM32F103Cx

Abstract: STM32F103Rx vfQFPn-36 footprint stm32f10x manual timer pwm STM32F10x STM32F103xB STM32F103Tx
Contextual Info: STM32F103x6 STM32F103x8 STM32F103xB Performance line, ARM-based 32-bit MCU with up to 128 KB Flash, USB, CAN, seven 16-bit timers, 2 ADCs & 9 communication interfaces Features • ■ ■ Core: ARM 32-bit Cortex -M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1