DIN17 Search Results

50-WVDC

Abstract: 50WVDC DIN11 DS90C241 DIN13 DIN23
Contextual Info: DS90C241 SER DINO DIN1 DIN2 DIN3 DIN4 DIN5 DIN6 DIN7 LVCMOS Parallel Interface < DIN8 DIN9 DIN10 DIN11 DIN12 DIN13 DIN14 DIN15 DIN16 DIN17 DIN18 DIN19 DIN20 DIN21 DIN22 DIN23 VDDPTO VDDPT1 VDDIT VDDL VDDT DOUT+ TCLK GPO 3.3V TPWDNB = System GPO DEN = High (ON)

DIN11

Abstract: DS90UR241
Contextual Info: DS90UR241 SER DINO DIN1 DIN2 DIN3 DIN4 DIN5 DIN6 DIN7 LVCMOS Parallel Interface < DIN8 DIN9 DIN10 DIN11 DIN12 DIN13 DIN14 DIN15 DIN16 DIN17 DIN18 DIN19 DIN20 DIN21 DIN22 DIN23 3.3V VDD VDD VDD VDD VDD VDD DOUT+ TCLK GPOs if used, or tie High (ON) | >•

IDC2X10M

Abstract: HEADER 2 IDC2X HEADER2 DIN13 DS92LV18 1287ST 1287-ST DIN11 ROUT21
Contextual Info: 5 4 3 2 J1 DIN0 DIN1 DIN2 DIN3 C DIN4 DIN5 DIN6 DIN7 DIN8 DIN9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 IDC2X10M R1 R3 R5 R7 R9 R2 R4 R6 R8 R10 50 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 DIN11 DIN12 DIN13 DIN14 DIN15 DIN16 B DIN17 TCLK

MAX9263

Abstract: MAX9264 prng IEC ACB symbols PJ 62 SPREAD-SPECTRUM SYSTEM
Contextual Info: 19-5644; Rev 1; 3/11 TION KIT EVALUA BLE IL AVA A HDCP Gigabit Multimedia Serial Link Serializer/Deserializer The MAX9263/MAX9264 chipset extends Maxim’s gigabit multimedia serial link GMSL technology to include highbandwidth digital content protection (HDCP) encryption

DS92LV18

Abstract: 2003120 ds92lv18tvv
Contextual Info: DS92LV18 DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz Literature Number: SNLS156D DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz General Description Features The DS92LV18 Serializer/Deserializer SERDES pair transparently translates a 18–bit parallel bus into a BLVDS serial

6206a

Abstract: K-Line transceiver w1p 84 st10f2xx sigma asc 333 24 pin K-line ST10F276E W1P 59 st10 Bootstrap st10273e
Contextual Info: ST10F276E 16-bit MCU with MAC unit 832 Kbyte Flash memory and 68 Kbyte RAM Datasheet − production data Features • ■ ■ ■ ■ ■ Highly performance 16-bit CPU with DSP functions – 31.25ns instruction cycle time at 64MHz max CPU clock – Multiply/accumulate unit MAC 16 x 16-bit

Contextual Info: > 4M C C DEVICE SPECIFICATION 33 x 32 1.25 G B IT/S D IFF E R E N T IA L CR O SSPO IN T SW ITCH S2028 GENERAL DESCRIPTION FEATURES 33 x 32 differential crosspoint switch Full broadcast switching capability Differential 10K PECL data path Configurable differential output driver

DS90C124

Contextual Info: DS90C241 Serializer and DS90C124 Deserializer Evaluation Kit User’s Manual NSID: SERDES24-35USB Rev 1.5 National Semiconductor Corporation Date: 2/27/2008 Page 1 of 39 Table of Contents TABLE OF CONTENTS . 2

Contextual Info: D S 9 9 R 1 0 5 ,D S 9 9 R 1 0 6 DS99R105/DS99R106 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer Texas INSTRUMENTS Literature Number: SNLS242C £/r Semiconductor D S 9 9 R 1 0 5 /D S 9 9 R 1 06 3 -4 0M H z D C -B alanced 2 4-B it LVD S S e ria lize r and

131-6 bj 025

Contextual Info: D S 9 9 R 1 0 3 ,D S 9 9 R 1 0 4 DS99R103/DS99R104 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer Te x a s INSTRUMENTS Literature Number: SNLS241C a t i o n a l D S 9 9 R 1 0 3 /D S 9 9 R 1 04 3 -4 0M H z D C -B alanced 2 4-B it LVD S S e ria lize r and

DS90UB926

Abstract: DS90Ub926Q SNLS407 LVDS 35-bit SSC
Contextual Info: DS90UB925Q 5 - 85 MHz 24-bit Color FPD-Link III Serializer with Bidirectional Control Channel General Description Features The DS90UB925Q serializer, in conjunction with the DS90UB926Q deserializer, provides a complete digital interface for concurrent transmission of high-speed video, audio,

GS1572-IBE3

Abstract: sd 4841 p GS1572 sd 4842 cea-861 352M CEA861 HD-SDI serializer 16 bit parallel GO1555 gs1572ibe3
Contextual Info: GS1572 Multi-Rate Serializer with Cable Driver and ClockCleanerTM Key Features Description • HD-SDI, SD-SDI, DVB-ASI transmitter • Integrated SMPTE 292M and 259M-C compliant cable driver • Integrated ClockCleaner • User selectable video processing features, including:

LF48410JI30

Abstract: DIN11 HSP48410 LF48410
Contextual Info: LF48410 LF48410 DEVICES INCORPORATED 1024 x 24-bit Video Histogrammer 1024 x 24-bit Video Histogrammer DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 40 MHz Data Input and Computation Rate ❑ 1024 x 24-bit Memory Array ❑ Histograms of Images up to 4K x 4K with 10-bit Pixel Resolution

D3318

Abstract: direct pm modulation circuit PDSP16350 PDSP16488A PDSP16510A COS10
Contextual Info: PDSP16350 PDSP16350 I/Q Splitter/NCO Supersedes version in December 1993 Digital Video & DSP IC Handbook, HB3923-1 The PDSP16350 provides an integrated solution to the need for very accurate, digitised, sine and cosine waveforms. Both these waveforms are produced simultaneously, with 16

Contextual Info: EVALUATION KIT AVAILABLE MAX9277/MAX9281 General Description The MAX9277/MAX9281 are 3.12Gbps Gigabit Multimedia Serial Link GMSL serializers with 3- or 4-data lane LVDS input (oLDI) and a CML serial output programmable for 50Ω coax or 100Ω shielded twisted pair (STP) cable drive.

COS10

Abstract: PDSP16350 PDSP16488A PDSP16510A DIN24 PDSP16256/A
Contextual Info: PDSP16350 PDSP16350 I/Q Splitter/NCO DS3711 The PDSP16350 provides an integrated solution to the need for very accurate, digitised, sine and cosine waveforms. Both these waveforms are produced simultaneously, with 16 bit amplitude accuracy, and are synthesised using a 34 bit

Crossbow

Abstract: S 187 S2024B-6 register file DIN31
Contextual Info: DEVICE SPECIFICATION “CROSSBOW” 32 X 32 800 MBIT/S CROSSPOINT SWITCH “CROSSBOW” X 32 800 MBIT/S CROSSPOINT SWITCH BiCMOS PECL 32 CLOCK GENERATOR FEATURES GENERAL DESCRIPTION • Full broadcast switching capability • 32 x 32 crosspoint structure, expandable to 64 x

GO1555

Abstract: SMPTE 352 1kv hd GS1531 hd-SDI driver RP 165 smpte bt.656 parallel to serial bt.656 parallel to serial conversion 352M GS4911
Contextual Info: GS1531 HD-LINX II Multi-Rate Serializer with ClockCleaner GS1531 Data Sheet Key Features Description • SMPTE 292M and SMPTE 259M-C compliant scrambling and NRZ → NRZI encoding with bypass • DVB-ASI sync word insertion and 8b/10b encoding • Rejection of more than 300ps jitter on the input

DIN17410

Abstract: CM3250 meder -b hcj 30 450C
Contextual Info: 关于磁铁 MEDER electronic 磁铁及其规格 在市场上各种不同特性的磁铁琳琅满目，几乎所有 尺寸和外形都可以实现。要激活磁簧开关，磁铁 磁 场 是必须的，不同磁铁物料会有偏向正或负极的特 性，主要取决于磁铁的尺寸，外形及环境因素。其中

Contextual Info: EVALUATION KIT AVAILABLE MAX9277/MAX9281 General Description The MAX9277/MAX9281 are 3.12Gbps Gigabit Multimedia Serial Link GMSL serializers with 3- or 4-data lane LVDS input (oLDI) and a CML serial output programmable for 50Ω coax or 100Ω shielded twisted pair (STP) cable drive.

st10f276 jtag

Abstract: w1p 59 ST10F276 st10 Bootstrap EF52 transistor w2P w1p 83 W1P 76 transistor LQFP144 ST10
Contextual Info: ST10F276 16-bit MCU with MAC unit, 832 Kbyte Flash memory and 68 Kbyte RAM Features • ■ ■ ■ ■ ■ Highly performant 16-bit CPU with DSP functions – 31.25ns instruction cycle time at 64MHz max CPU clock – Multiply/accumulate unit MAC 16 x 16-bit

SCSI 100 connector datasheet

Abstract: DIN28 working of 5 pin relay 100 pin scsi 100-pin SCSI female connector n type connector female CB-89200-2 DIN24 relay 5 pin Backup output protect
Contextual Info: DASP-52064 Isolated 32 D/I & 32 D/O Card Features 32 isolated digital inputs for source type 32 interrupt input I/O digital input 32 isolated digital outputs for sink type 2K battery backup RAM for backup nonvolatile data (only for DASP-52064) One programmable timer and interrupt

1kv hd

Abstract: bt.656 parallel to serial conversion 352M GO1525 GS1531 GS4911 RP 165 smpte
Contextual Info: GS1531 HD-LINX II Multi-Rate Serializer GS1531 Data Sheet Key Features Description • SMPTE 292M and SMPTE 259M-C compliant scrambling and NRZ → NRZI encoding with bypass • DVB-ASI sync word insertion and 8b/10b encoding • Superior rejection of jitter on input PCLK

Contextual Info: DS92LV18 DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz Literature Number: SNLS156D DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz General Description Features The DS92LV18 Serializer/Deserializer SERDES pair transparently translates a 18–bit parallel bus into a BLVDS serial