DS1010 EQUIVALENT Search Results

74LS

Abstract: DS1010 DS1010-50 DS1010-60 DS1010-75 DS1010G DS1010S
Contextual Info: DS1010 DALLAS SEMICONDUCTOR DS1010 10-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay • 10 taps equally spaced C 1 NcC 2 in • Delays are stable and precise • Leading and trailing edge accuracy ncE 3 TAP 2 [I 4 • Delay tolerance ±5% or ±2 ns, whichever is greater

Contextual Info: DS1010 DALLAS SEMICONDUCTOR DS1010 10-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay • 10 taps equally spaced C 1 NcC 2 in • Delays are stable and precise • Leading and trailing edge accuracy ncE 3 TAP 2 [I 4 • Delay tolerance ±5% or ±2 ns, whichever is greater

74ls gate symbols

Abstract: 74FO4 pin diagram of 74LS "Delay Lines" 74ls series 74LS SERIES cmos logic data DS1010-60 74LS series datasheet 74ls series logic DS1010-200
Contextual Info: DS1010 DS1010 10-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay IN1 1 14 VCC NC 2 13 TAP 1 IN 1 16 VCC TAP 2 3 12 TAP 3 NC 2 15 NC • Leading and trailing edge accuracy TAP 4 4 11 NC TAP 2 3 14 TAP 5 TAP 1 • Delay tolerance ±5% or ±2 ns, whichever is greater

74LS

Abstract: DS1010 DS1010-100 DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010S ds1010-500
Contextual Info: DS1010 DS1010 10-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay IN1 1 14 VCC NC 2 13 TAP 1 IN 1 16 VCC TAP 2 3 12 TAP 3 NC 2 15 NC • Leading and trailing edge accuracy TAP 4 4 11 NC TAP 2 3 14 TAP 5 TAP 1 • Delay tolerance ±5% or ±2 ns, whichever is greater

74FO4

Abstract: ds1010-100 74LS DS1010 DS1010-125 DS1010-150 DS1010-50 DS1010-60 DS1010-75 DS1010-80
Contextual Info: DS1010 10-Tap Silicon Delay Line www.dalsemi.com FEATURES All-silicon time delay 10 taps equally spaced Delays are stable and precise Leading and trailing edge accuracy Delay tolerance ±5% or ±2 ns, whichever is greater Economical Auto-insertable, low profile

ISPPAC-CLK5312S-01TN48I

Abstract: ISPPAC-CLK5308S-01TN48I 5304S DS1010 LVCMOS25 LVCMOS33 clk5304 ISPPAC-CLK5308 DS10100 clk5312s
Contextual Info: ispClock 5300S Family In-System Programmable, Zero-Delay Universal Fan-Out Buffer, Single-Ended October 2007 Preliminary Data Sheet DS1010 Features • Up to +/- 5ns skew range • Coarse and fine adjustment modes • Four Operating Configurations •

DS1010-500

Abstract: 56-G4009-001B 74FO4 DS1010-125
Contextual Info: DS1010 10-Tap Silicon Delay Line www.dalsemi.com FEATURES All-silicon time delay 10 taps equally spaced Delays are stable and precise Leading and trailing edge accuracy Delay tolerance ±5% or ±2 ns, whichever is greater Economical Auto-insertable, low profile

74LS

Abstract: DS1010 DS1010-100 DS1010-125 DS1010-150 DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010S
Contextual Info: DS1010 10-Tap Silicon Delay Line www.dalsemi.com PIN ASSIGNMENT All-silicon time delay 10 taps equally spaced Delays are stable and precise Leading and trailing edge accuracy Delay tolerance ±5% or ±2 ns, whichever is greater Economical Auto-insertable, low profile

VK 5308

Abstract: 5308S 5304S IC
Contextual Info: ispClock 5300S Family In-System Programmable, Zero-Delay Universal Fan-Out Buffer, Single-Ended October 2006 Preliminary Data Sheet DS1010 Features • Up to +/- 5ns skew range • Coarse and fine adjustment modes • Four Operating Configurations •

Contextual Info: ispClock 5300S Family In-System Programmable, Zero-Delay Universal Fan-Out Buffer, Single-Ended June 2006 Preliminary Data Sheet DS1010 Features • Up to +/- 5ns skew range • Coarse and fine adjustment modes • Four Operating Configurations • •

ds1010-100

Abstract: 74LS DS1010 DS1010-125 DS1010-150 DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010S
Contextual Info: DS1010 10-Tap Silicon Delay Line www.dalsemi.com FEATURES All-silicon time delay 10 taps equally spaced Delays are stable and precise Leading and trailing edge accuracy Delay tolerance ±5% or ±2 ns, whichever is greater Economical Auto-insertable, low profile

Contextual Info: DALLAS SEMICONDUCTOR DS1010 10-Tap Silicon Delay Line PIN ASSIGNMENT FEATURES • All-silicon time delay • 10 taps equally spaced • Delays are stable and precise IN1 [ 1 14 Nc r 2 13 ] TAP 1 TAP2[ 3 12 ] TAP 3 11 ] TAP 5 ] V cc • Leading and trailing edge accuracy

4SO16

Abstract: 74FO4 74LS Series IC list DS1110-500 DS1110-50 74LS DS1010 DS1110 DS1110E J-STD-020A
Contextual Info: Rev 1; 11/03 10-Tap Silicon Delay Line The DS1110 delay line is an improved replacement for the DS1010. It has ten equally spaced taps providing delays from 5ns to 500ns. The devices are offered in a standard 16-pin SO or 14-pin TSSOP. The DS1110 series delay lines provide a nominal accuracy of ±5% or ±2ns,

Contextual Info: DS 1010 DS1010 DALLAS SEMICONDUCTOR 10-Tap Silicon Delay Line PIN ASSIGNMENT FEATURES • All-silicon time delay IN1 [ " ^3 7 ] vcc • 10 taps equally spaced • Delays are stable and precise NC c ] TAP 1 TAP 2 C ] TAP 3 ] TAP 5 ] TAP 7 TAP 4 C 1 TAP 9 TAP 6 d

DS1110-500

Abstract: 74LS DS1010 DS1110 DS1110E J-STD-020A
Contextual Info: Rev 0; 6/02 10-Tap Silicon Delay Line The DS1110 delay line is an improved replacement for the DS1010. It has ten equally spaced taps providing delays from 5ns to 500ns. The devices are offered in a standard 14-pin DIP, 16-pin SO, or 14-pin TSSOP. The DS1110 series delay lines provide a nominal accuracy of

Contextual Info: DS 1010 DS1010 DALLAS 10 s e m ic o n d u c t o r ~T a P Silicon D elay Line PIN ASSIGNMENT FEATURES • All-silicon time delay IN1 £ 1 • 10 taps equally spaced KOI 14 ] Vcc NC[ 2 13 ] TAP 1 in C 1 • Delays are stable and precise TAP 2 ^ 3 12 ] TAP 3

DS1010

Abstract: 74LS DS1010-100 DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010S dip switch data
Contextual Info: DS 1010 DALLAS DS1010 10-Tap Silicon Delay Line s e m ic o n d u c t o r FEATURES PIN ASSIGNMENT • All-silicon tim e delay ini r 1 14 V cc NO 2 13 TAP 1 TAP 2 [_ 3 12 TAP 3 4 11 TAP 5 TAP 6 \_ 5 10 TAP 7 TAP 4 6 9 TAP 9 TAP 6 • 10 taps equally spaced • Delays are stable and precise

Contextual Info: DALLAS SEMICONDUCTOR FEATURES D S 10 10 10-Tap Silicon Delay Line PIN A S S IG N M E N T • All-silicon time delay • 10 taps equally spaced • Delays are stable and precise • Leading and trailing edge accuracy • Delay tolerance ±5% or ±2 ns, whichever is greater

ic 74138 pin diagram

Abstract: ic 74138 pin out diagram of 74138 ic pin diagram of ic 74138 DS1000K-25 74138 ic diagram DS1065 DL620 DDU-66-XXX DS1040 equivalent
Contextual Info: Silicon Timed Circuits Fixed delay lines are the core of the Silicon Timed Circuits family. These are all-silicon replacements for hybrid delay lines. The all-silicon delay lines offer a number of advantages over hybrid components: ♦ Increased reliability

ds1214

Abstract: dallas ds1280 DS1666 PRODUCT CHANGE NOTICE DS2013 DS1666-50 DS1667-100 DS1666 DS2011 DS1003 DS1007
Contextual Info: DALLAS SEMICONDUCTOR 4401 South Beltwood Parkway Dallas, Texas 75244-3292 972 371-4000 Date: 11/4/97 Subject: PRODUCT CHANGE NOTICE - J70201 Description: New Passivation Deposition Equipment

DS1669 equivalent

Abstract: DS2011D DS2013 DS1228 DS1666 74F04 DS1640 DS1003-16 DS1003-20 DS1003-33
Contextual Info: DS1003 DS1003 DALLAS SEMICONDUCTOR FEATURES 4-Tap Silicon Delay Line for RISC A pplications PIN ASSIGNMENT • All-silicon tim e delay • Four delayed clock phases from input • Input frequency independent • Precise tap-to-tap delays • Leading and trailing edge precision

DS1666

Abstract: DS2011D 74F04 DS1003 DS1003-16 DS1003-20 DS1003-25 DS1003-33 DS1003-40 DS1003M
Contextual Info: DS1003 DS1003 DALLAS SEMICONDUCTOR FEATURES 4-Tap Silicon Delay Line for RISC A pplications PIN ASSIGNMENT • All-silicon tim e delay IN • Four delayed clock phases from input NC • Input frequency independent NC NC • Precise tap-to-tap delays • Leading and trailing edge precision

DS1669 equivalent

Abstract: DS1640
Contextual Info: DS1003 DS1003 DALLAS SEMICONDUCTOR FEATURES 4-Tap Silicon Delay Line for RISC A pplications PIN ASSIGNMENT • All-silicon tim e delay IN • Four delayed clock phases from input NC • Input frequency independent NC NC • Precise tap-to-tap delays • Leading and trailing edge precision

DS1640

Contextual Info: DALLAS s e m ic o n d u c to r DS1625 Digital Thermometer and Thermostat FEATURES PIN ASSIGNMENT • Tem perature m easurem ents require no external com ­ ponents • Measures tem peratures from -5 5 °C to +125°C in 0.5°C increments. Fahrenheit equivalent is -6 7 °F to