DS174PP1 Search Results

CS8920

Contextual Info: 4/22/97 Performance Summary: CS8920 Datasheet Change ISA Plug-and-Play Ethernet Controller DS174PP1 MAR ‘96 Corrections to The CS8920 Data Sheet Page Correction 7 Figure 1.3. Typical Connection Diagram: the label for pin 115 “HWSLEEP” should be changed to

ic laf 0001

Abstract: laf 0001 M3161 laf 0001 power 95a313 DNA 1001 DL laf 001 testing motherboards using multi meter au mac he nrc IEEE-48
Contextual Info: CS8920 A Cirrus Logic Company ISA Plug-and-Play Ethernet Controller Features Description • Single-Chip IEEE 802.3 Ethernet Controller with Direct ISA-Bus Interface • • • • Implements Industry-Standard Plug and Play Full Duplex Operation Auto-Negotiation of Full and Half duplex Modes

Contextual Info: CS8920 A Cirrus Logic Company ISA Plug-and-Play Ethernet Controller Features Description • The CS8920 is a low-cost Ethernet LAN Controller op­ timized for Industry Standard Architecture ISA Per­ sonal Computers. Its highly-integrated design elimi­

Contextual Info: 12.0 AUI Wiring CS8920 1 :1 DB15 DO + Tx 3 DO- 10 4 1:1 + Col CI + Q| _ 2 0.1 |j.F 39.2 SI 39.2 £2 g 1:1 Dl + Rx Dl - 0.1 nF 5 39.2 Q 39.2 a 12 13 +12 V 13.0 Quartz Crystal Requirements If a 20 MHz quartz crystal is used, it must meet the following specifications:

Contextual Info: CS8920 14.0 PHYSICAL DIMENSIONS 01 144-pln TQFP DIM A A1 B C D D1 E E1 e L L1 oc MILLIMETERS MIN NOM MAX 1.25 1.43 1.60 0.00 0.10 0.20 0.17 0.22 0.27 0 09 0.15 0.20 21.70 22.00 22.30 20.00 21.70 22.00 22.30 20.00 0.40 0.50 0.60 0.45 0.75 0.65 1.00 REF 12“

Contextual Info: CS8920 1.0 INTRODUCTION 1.1 General Description cient memory management schemes. The onchip b uffer manager supports full-duplex operation. The CS8920 is a single-chip, IS A Plug-and-Play, full-duplex, Ethernet solution, incorporating all of the analog and digital circuitry needed for a

testing motherboards using multi meter

Abstract: M3161 0158H GSO 69 testing motherboards components using multi meter 10BASE2 10BASE5 CDK8920 CS8920 CS8920-CQ
Contextual Info: CS8920 A Cirrus Logic Company ISA Plug-and-Play Ethernet Controller Features Description • The CS8920 is a low-cost Ethernet LAN Controller op­ timized for Industry Standard Architecture ISA Per­ sonal Computers. Its highly-integrated design elimi­

Contextual Info: CS8920 A Cirrus Logic Company ISA Plug-and-Play Ethernet Controller Features Description • The CS8920 is a low-cost Ethernet LAN Controller op­ timized for Industry Standard Architecture ISA Per­ sonal Computers. Its highly-integrated design elimi­

Contextual Info: 4.0 PACKETPAGE ARCHITECTURE Bus Interface Registers 4.1 PacketPage Overview T he B us Interface registers are used to configure the C S 8 9 2 0 ’s IS A -bus interface and to m ap the C S 8 9 2 0 into the h o st sy ste m 's I/O an d M em ory space. M ost o f these registers are w ritten only

emr6

Contextual Info: CS8920 10.0 SWITCHING CHARACTERISTICS 16-BIT I/O READ, IOCHRDY NOT USED Parameter Min Symbol Address, AEN, SBHE active to IOCS16 low t|OR1 Address, AEN, SBHE active to IOR active _ tlO R 2 IOR low to SD valid tlO R 3 Max 35 20 tlO R 4 15 IOR inactive to active

laf 0001

Abstract: ic laf 0001 laf 0001 power center tap transformer 10BASE2 10BASE5 10BASET CDK8920 CS8920 CS8920-CQ
Contextual Info: CS8920 ISA Plug-and-Play Ethernet Controller Features Description • Single-Chip IEEE 802.3 Ethernet Controller with • • • • • • • • • • • • Direct ISA-Bus Interface Implements Industry-Standard Plug and Play Full Duplex Operation

Contextual Info: 5.0 OPERATION 5.1 Managing Interrupts and Servicing the Interrupt Status Queue The Interrupt Status Queue IS Q is used by the CS8920 to communicate Event reports to the host processor. Whenever an event occurs that triggers an enabled interrupt, the CS8920 sets the

Contextual Info: CS8920 3.0 FUNCTIONAL DESCRIPTION 3.1 O verview During normal operation, the CS8920 performs two basic functions: Ethernet packet transmis­ sion and reception. Before transmission or reception is possible, the CS8920 must be con­ figured. Configuration The CS8920 must be configured for packet

Contextual Info: CS8920 B Buffer Configuration (BufCFG) (C) Buffer Event (BufEvent) (D) Advance Interrupt Control and Status (ADVintCTL/ST) (10) Receive M iss C ounter (RxM ISS (12) Trans. Collision Count (TxCOL) (13) Line Control (LineCTL) . (14) Line Status (LineST) .

Contextual Info: 2.0 PIN DESCRIPTION 2.1 Pin Diagram S îj j S Q U , + D ifl + 5) 2 , + :J ' <2 <‘2 Xh Xh < 2<>< >( L£ JŒx x1 > >x><>>6ç - - - i E < < P P < < 0 Û U U Û Q ;33<<3QCO</)QQQt/)rtQt/)Q •ocDcos(ûifi^niM' EWAKE ASUB1 FXDLED EEDO EECH CSOUT DRQ7 DACK7 DVSS1

center tap transformer

Contextual Info: 11.0 10BASE-T Wiring CS8920 1 :2 TXD + TD + Rt 1 68 pF TXD Rt ° '1 TD 2 RJ45 RXD+ 1 ’ 1 + RXD- ° ' 1 ^*F RD + Rr Rr RD- 6 NOTES: 1. If a center tap transformer is used on the RXD+ and RXD- inputs, replace the pair of Rr resistors with a single 2xRr resistor.

Contextual Info: 7.0 ABSOLUTE MAXIMUM RATINGS AVSS, DVSS = 0 V, all voltages with respect to 0 V. Parameter Power Supply: Digital Analog Input Current Symbol Min Max Units dV dd -0.3 -0.3 6.0 6.0 V V aV dd (Except Supply Pins) Analog Input Voltage Digital Input Voltage Ambient Temperature