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    Contextual Info: 74AUP2G34 DUAL BUFFERS Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable applications. ADVANCED INFORMATION The 74AUP2G34 is composed of two buffers with standard push-pull


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    74AUP2G34 74AUP2G34 DS35514 PDF

    Contextual Info: 74AUP2G34 DUAL BUFFERS Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable applications. ADVANCED ADVANCEDINFORMATION INFORMATION The 74AUP2G34 is composed of two buffers with standard push-pull


    Original
    74AUP2G34 74AUP2G34 DS35514 PDF

    Contextual Info: 74AUP2G34 DUAL BUFFER GATE Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable applications. NEW PRODUCT ADVANCED INFORMATION The 74AUP2G34 is a dual buffer gate with standard push-pull outputs


    Original
    74AUP2G34 74AUP2G34 DS35514 PDF