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    DUAL CLOCK FIFO Search Results

    DUAL CLOCK FIFO Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    FO-DUALSTLC00-004
    Amphenol Cables on Demand Amphenol FO-DUALSTLC00-004 ST-LC Duplex Multimode 62.5/125 Fiber Optic Patch Cable (OFNR Riser) - 2 x ST Male to 2 x LC Male 4m Datasheet
    FO-DUALLCX2MM-003
    Amphenol Cables on Demand Amphenol FO-DUALLCX2MM-003 LC-LC Duplex Multimode 62.5/125 Fiber Optic Patch Cable (OFNR Riser) - 2 x LC Male to 2 x LC Male 3m Datasheet
    FO-DUALLCX2MM-001
    Amphenol Cables on Demand Amphenol FO-DUALLCX2MM-001 LC-LC Duplex Multimode 62.5/125 Fiber Optic Patch Cable (OFNR Riser) - 2 x LC Male to 2 x LC Male 1m Datasheet
    FO-LSDUALSCSM-003
    Amphenol Cables on Demand Amphenol FO-LSDUALSCSM-003 SC-SC Duplex Single-Mode 9/125 Fiber Optic Patch Cable (OFN-LS Low Smoke) - 2 x SC Male to 2 x SC Male 3m Datasheet
    FO-DUALSTLC00-001
    Amphenol Cables on Demand Amphenol FO-DUALSTLC00-001 ST-LC Duplex Multimode 62.5/125 Fiber Optic Patch Cable (OFNR Riser) - 2 x ST Male to 2 x LC Male 1m Datasheet

    DUAL CLOCK FIFO Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    DL010

    Contextual Info: Dual Direct Rambus Clock Generator ® RAMBUS Overview The Dual Direct Rambus® Clock Generator DRCG-D provides the necessary clock signals to support a Dual channel Direct Rambus memory subsystem. The DRCG-D is a functional extension of the DRCG and maintains memory channel signal integrity. It includes


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    28-pin DL-0107, DL-0107 DL010 PDF

    schematic for vga splitter

    Abstract: epson printer board schematic SAM080UPM schematic diagram vga to laptop TP-104-01 WIRING diagram vga to usb CABLE VGA 15 PIN wiring DIAGRAM usb ultrasound probe RN116 tp-105-01-09
    Contextual Info: Evaluation Board for Dual VGA and ADC EVAL-AD8332/AD9238 FEATURES INTRODUCTION Full selection of VGA functions Self-contained high speed differential dual ADC On-board clock source Provisions for external clock Jumper selectable VGA features Standard ADI HSC FIFO board for control


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    EVAL-AD8332/AD9238 EVAL-AD8332/AD9238 2/AD9238 EB05306 schematic for vga splitter epson printer board schematic SAM080UPM schematic diagram vga to laptop TP-104-01 WIRING diagram vga to usb CABLE VGA 15 PIN wiring DIAGRAM usb ultrasound probe RN116 tp-105-01-09 PDF

    AN3131

    Contextual Info: Implementing Clock Switchover in Stratix & Stratix GX Devices January 2004, 1.0 Application Note Introduction The clock switchover feature allows the PLL to switch between two reference input clocks. Designers can use this feature for clock redundancy or for a dual clock domain application such as in a system


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    PDF

    dcfifo

    Abstract: asynchronous fifo vhdl altera MTBF dcfifo_mixed_widths
    Contextual Info: SCFIFO and DCFIFO Megafunctions UG-MFNALT_FIFO-6.2 User Guide Altera provides FIFO functions through the parameterizable single-clock FIFO SCFIFO and dual-clock FIFO (DCFIFO) megafunctions. The FIFO functions are mostly applied in data buffering applications that comply with the first-in-first-out


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    PDF

    S2002

    Abstract: S2202 7.2 channel receiver
    Contextual Info: DEVICE SPECIFICATION DUAL GIGABIT ETHERNET DEVICE DUAL GIGABIT ETHERNET DEVICE FEATURES GENERAL DESCRIPTION • 1250 MHz Gigabit Ethernet operating rate - Half rate operation • Dual Transmitter with phase-locked loop (PLL) clock synthesis from low speed reference


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    S2202 S2002 S2202 7.2 channel receiver PDF

    diode T B 8A

    Abstract: Fibre channel twinax S2002 S2102 receiver timing recovery frame synchronization
    Contextual Info: DEVICE SPECIFICATION DUAL FIBRE CHANNEL DEVICE DUAL FIBRE CHANNEL DEVICE S2102 S2102 FEATURES GENERAL DESCRIPTION • 1062 MHz Fibre Channel operating rate - Half rate operation • Dual Transmitter with phase-locked loop (PLL) clock synthesis from low speed reference


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    S2102 diode T B 8A Fibre channel twinax S2002 S2102 receiver timing recovery frame synchronization PDF

    S2102

    Abstract: S2002
    Contextual Info: DEVICE SPECIFICATION DUAL FIBRE CHANNEL DEVICE DUAL FIBRE CHANNEL DEVICE S2102 S2102 FEATURES GENERAL DESCRIPTION • 1062 MHz Fibre Channel operating rate - Half rate operation • Dual Transmitter with phase-locked loop (PLL) clock synthesis from low speed reference


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    S2102 x3T11 S2102 D109/R163 S2002 PDF

    Contextual Info: Philips Semiconductors Product specification Dual asynchronous receiver/transmitter DUART SCN68681 - External 1X or 16X clock DESCRIPTION The Philips Semiconductors SCN68681 Dual Universal Asynchronous ReceiverfiVansmitter (DUART) is a single-chip MOS-LSI communications device that provides two independent


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    SCN68681 SCN68681 S68000 SCC2691, SCC2692, SCC2698B SC68692 SD00097 PDF

    D3B sot-23-6

    Abstract: D15AA smd transistor p16 29 conn pwr 2 PCB footprint DIODE SMD C136 bb681 TBD0402 CC0603KRX7R9 OMRON p7 487 pj 69 SMD diode
    Contextual Info: Preliminary Technical Data Evaluation Board for the Dual, Continuous Time Sigma-Delta Modulator AD9267EBZ To achieve optimal performance from the AD9267, a low jitter differential clock is necessary, and the AD9516 family of parts offers superior clock performance. The AD9516 and a crystal


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    AD9267EBZ AD9267, AD9516 AD9267 16-bit AD9516-0BCPZ ADL5382ACPZ P100KZCT-ND D3B sot-23-6 D15AA smd transistor p16 29 conn pwr 2 PCB footprint DIODE SMD C136 bb681 TBD0402 CC0603KRX7R9 OMRON p7 487 pj 69 SMD diode PDF

    MS-026

    Abstract: S-PQFP-G48 ST16C2550 TL16C752 TL16C752B
    Contextual Info: TL16C752B 3.3-V DUAL UART WITH 64-BYTE FIFO SLLS405 – DECEMBER 1999 D D D D D D D D D D Pin Compatible With ST16C2550 With Additional Enhancements Up to 1.5 Mbps Baud Rate When Using Crystal 24 MHz Input Clock Up to 2.25 Mbps Baud Rate When Using Oscillator or Clock Source (36 MHz Input


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    TL16C752B 64-BYTE SLLS405 ST16C2550 MS-026 S-PQFP-G48 TL16C752 TL16C752B PDF

    VSC8664

    Abstract: 1000BASE-X sfp sgmii IEEE1588 integrated mac and phy Synchronous Ethernet GPIO74 1000BASE-X sgmii switch 100BASE-FX IEEE-1588 IEEE1588 phy
    Contextual Info: VSC8664 PRODUCT BRIEF Quad Port 10/100/1000BASE-T PHY and 100BASE-FX/1000BASE-X SerDes with Recovered Clock Outputs The industry’s first PHY with dual recovered clock outputs delivers carrier-quality Synchronous Ethernet Helping OEMs to capitalize on the cost reduction and optimization of


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    VSC8664 10/100/1000BASE-T 100BASE-FX/1000BASE-X VSC8664 8261/Y 1000BASE-X sfp sgmii IEEE1588 integrated mac and phy Synchronous Ethernet GPIO74 1000BASE-X sgmii switch 100BASE-FX IEEE-1588 IEEE1588 phy PDF

    Contextual Info: Product specification Philips Sem iconductors Data C om m unications Products Dual asynchronous receiver/transm itter DUART - External 1X o r 16X clock DESCRIPTION The Philips Sem iconductors SC C68692 Dual Universal Asynchronous R eceiver/Transm itter (DUART) is a single-chip


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    SCC68692 SCC68692 S68000 C2692, C2698B SC68692 PDF

    Contextual Info: ADS5409 www.ti.com SLAS952 – MARCH 2013 Dual 12-Bit 900Msps Analog-to-Digital Converter Check for Samples: ADS5409 FEATURES 1 • Dual Channel 12-Bit Resolution Maximum Clock Rate: 900 Msps Low Swing Fullscale Input: 1.0 Vpp Analog Input Buffer with High Impedance Input


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    ADS5409 SLAS952 12-Bit 900Msps 196-Pin 12x12mm) 900Msps ADS5402 PDF

    Contextual Info: ADS54T04 www.ti.com SLAS917 – DECEMBER 2012 Dual Channel 12-Bit 500Msps Receiver and Feedback IC Check for Samples: ADS54T04 FEATURES 1 • • • • • • • • Dual Channel 12-Bit Resolution Maximum Clock Rate: 500 Msps Low Swing Fullscale Input: 1.0 Vpp


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    ADS54T04 SLAS917 12-Bit 500Msps 196-Pin 12x12mm) 800mW/ch ADS54T02 PDF

    Contextual Info: ADS5402 www.ti.com SLAS936 – MARCH 2013 Dual 12-Bit 800Msps Analog-to-Digital Converter Check for Samples: ADS5402 FEATURES 1 • • • • • • • • • Dual Channel 12-Bit Resolution Maximum Clock Rate: 800 Msps Low Swing Fullscale Input: 1.0 Vpp


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    ADS5402 SLAS936 12-Bit 800Msps 196-Pin 12x12mm) 800Msps ADS5401 PDF

    Contextual Info: ADS54T04 www.ti.com SLAS917 – DECEMBER 2012 Dual Channel 12-Bit 500Msps Receiver and Feedback IC Check for Samples: ADS54T04 FEATURES 1 • • • • • • • • Dual Channel 12-Bit Resolution Maximum Clock Rate: 500 Msps Low Swing Fullscale Input: 1.0 Vpp


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    ADS54T04 SLAS917 12-Bit 500Msps 196-Pin 12x12mm) 800mW/ch PDF

    12x12mm BGA package thermal resistance

    Abstract: DA5N
    Contextual Info: ADS5402 www.ti.com SLAS939 – JANUARY 2013 Dual 12-Bit 800Msps Analog-to-Digital Converter Check for Samples: ADS5402 FEATURES 1 • Dual Channel 12-Bit Resolution Maximum Clock Rate: 800 Msps Low Swing Fullscale Input: 1.0 Vpp Analog Input Buffer with High Impedance Input


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    ADS5402 SLAS939 12-Bit 800Msps 196-Pin 12x12mm) 1020mW/ch ADS5402 12x12mm BGA package thermal resistance DA5N PDF

    12x12mm BGA package thermal resistance

    Contextual Info: ADS5402 www.ti.com SLAS936 – MARCH 2013 Dual 12-Bit 800Msps Analog-to-Digital Converter Check for Samples: ADS5402 FEATURES 1 • • • • • • • • • Dual Channel 12-Bit Resolution Maximum Clock Rate: 800 Msps Low Swing Fullscale Input: 1.0 Vpp


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    ADS5402 SLAS936 12-Bit 800Msps 196-Pin 12x12mm) ADS5402 ADS5401 12x12mm BGA package thermal resistance PDF

    DA5N

    Abstract: 12x12mm BGA package thermal resistance
    Contextual Info: ADS5409 www.ti.com SLAS952 – MARCH 2013 Dual 12-Bit 900Msps Analog-to-Digital Converter Check for Samples: ADS5409 FEATURES 1 • Dual Channel 12-Bit Resolution Maximum Clock Rate: 900 Msps Low Swing Fullscale Input: 1.0 Vpp Analog Input Buffer with High Impedance Input


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    ADS5409 SLAS952 12-Bit 900Msps 196-Pin 12x12mm) 1090mW/ch ADS5409 DA5N 12x12mm BGA package thermal resistance PDF

    PC16550A

    Abstract: DP8477 PC87306 Transistor mcr 22-8 413 nec floppy circuit 8042AH C1995 DS1287 MC146818 N82077
    Contextual Info: November 1995 PC87306 SuperI O TM Enhanced Sidewinder Lite Floppy Disk Controller Keyboard Controller Real-Time Clock Dual UARTs Infrared Interface IEEE 1284 Parallel Port and IDE Interface General Description Features The PC87306 is a single chip solution incorporating a Keyboard and PS 2 Mouse Controller KBC Real Time Clock


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    PC87306 PC16550A DP8477 Transistor mcr 22-8 413 nec floppy circuit 8042AH C1995 DS1287 MC146818 N82077 PDF

    TMS 3874

    Abstract: Dynachip oasis diode a4W L4W 74 DL6000 DL6009 DL6020 DL6035 DL6055
    Contextual Info: DL6000 Family Fast Field Programmable Gate Array™ Features • System Clock Rates Up To 200 MHz • 9,000 to 105,000 Usable Gates • Synchronous Dual-port RAM with 8 ns Access Time • 2 Analog PLLs For Clock Multiplication, Division and Locking • LV-TTL and GTL Interface Levels


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    DL6000TM E-120 TMS 3874 Dynachip oasis diode a4W L4W 74 DL6000 DL6009 DL6020 DL6035 DL6055 PDF

    c1813

    Abstract: SCC2692 SCC2691 SCC2692AC1A44 SCC2692AE1A44 SCN68681
    Contextual Info: Philips Semiconductors Product specification Dual asynchronous receiver/transmitter DUART DESCRIPTION SCC2692 — External 1X or 16X clock The Philips Sem iconductors SCC2692 Dual Universal Asynchronous Receiver/Transm itter (DUART) is a single-chip CMOS-LSI com m unications device that provides two full-duplex


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    SCC2692 SCC2692 c1813 SCC2691 SCC2692AC1A44 SCC2692AE1A44 SCN68681 PDF

    Contextual Info: ADS54T04 www.ti.com SLAS917A – DECEMBER 2012 – REVISED AUGUST 2013 Dual Channel 12-Bit 500Msps Receiver and Feedback IC Check for Samples: ADS54T04 FEATURES 1 • • • • • • • • • • Dual Channel 12-Bit Resolution Maximum Clock Rate: 500 Msps


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    ADS54T04 SLAS917A 12-Bit 500Msps 196-Pin 12x12mm) 800mW/ch PDF

    cp2105-f01-gm

    Abstract: CP2105-GM CP2105 Rx 288
    Contextual Info: CP2105 Single Chip USB to Dual UART Bridge Single-Chip USB to Dual UART Data Transfer Integrated Standard UART Interface Features USB transceiver; no external resistors Data required Integrated clock; no external crystal required Integrated 296-Byte One-Time Programmable ROM


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    CP2105 296-Byte CP2105-GM QFN-24 cp2105-f01-gm CP2105 Rx 288 PDF