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    Intel Corporation EP2AGX125EF29I5

    IC FPGA 372 I/O 780FBGA
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    IC FPGA 452 I/O 1152FBGA
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    IC FPGA 372 I/O 780FBGA
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    IC FPGA 452 I/O 1152FBGA
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    Intel Corporation EP2AGX125EF29C4

    IC FPGA 372 I/O 780FBGA
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    EP2AGX125 Datasheets (45)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    EP2AGX125DF25C4 Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 260 I/O 572FBGA Original PDF
    EP2AGX125DF25C4N Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 260 I/O 572FBGA Original PDF
    EP2AGX125DF25C5 Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 260 I/O 572FBGA Original PDF
    EP2AGX125DF25C5N Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 260 I/O 572FBGA Original PDF
    EP2AGX125DF25C5NES Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 260 I/O 572FBGA Original PDF
    EP2AGX125DF25C6 Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 260 I/O 572FBGA Original PDF
    EP2AGX125DF25C6N Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 260 I/O 572FBGA Original PDF
    EP2AGX125DF25C6NES Altera Arria II GX FPGAs: Low-Cost Transceiver FPGAs with High-End Capabilities; 572 pin FBGA; 0 to 85°C Original PDF
    EP2AGX125DF25I3 Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 260 I/O 572FBGA Original PDF
    EP2AGX125DF25I3N Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 260 I/O 572FBGA Original PDF
    EP2AGX125DF25I5 Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 260 I/O 572FBGA Original PDF
    EP2AGX125DF25I5N Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 260 I/O 572FBGA Original PDF
    EP2AGX125EF29C4 Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 372 I/O 780FBGA Original PDF
    EP2AGX125EF29C4N Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 372 I/O 780FBGA Original PDF
    EP2AGX125EF29C5 Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 372 I/O 780FBGA Original PDF
    EP2AGX125EF29C5G Altera Integrated Circuits (ICs) - Embedded - FPGAs (Field Programmable Gate Array) - IC FPGA 372 I/O 780FBGA Original PDF
    EP2AGX125EF29C5N Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 372 I/O 780FBGA Original PDF
    EP2AGX125EF29C5NES Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 372 I/O 780FBGA Original PDF
    EP2AGX125EF29C6 Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 372 I/O 780FBGA Original PDF
    EP2AGX125EF29C6ES Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 372 I/O 780FBGA Original PDF

    EP2AGX125 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: Pin Information for the Arria II GX EP2AGX125 Device Version 1.2 Bank number QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL0 QL0 QL0 QL0 QL0


    Original     		PDF EP2AGX125 PT-EP2AGX125-1

    EP2AGX125

    Abstract: AD32 AA30 AA34 AB32
    Text: Pin Information for the Arria II GX EP2AGX125 Device Version 1.1 Bank number QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL2 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL1 QL0 QL0 QL0 QL0 QL0


    Original     		PDF EP2AGX125 PT-EP2AGX125-1 AD32 AA30 AA34 AB32

    Untitled

    Abstract: No abstract text available
    Text: AN 603: Active Serial Remote System Upgrade Reference Design AN-603-1.1 August 2013 This application note provides a reference design for the active serial AS remote system upgrade feature in Arria II GX, Stratix III, and Stratix IV devices. The AS


    Original     		PDF AN-603-1

    Untitled

    Abstract: No abstract text available
    Text: External Memory Interface Handbook Volume 5 Section I. ALTMEMPHY Design Tutorials External Memory Interface Handbook Volume 5 Section I. ALTMEMPHY Design Tutorials 101 Innovation Drive San Jose, CA 95134 www.altera.com EMI_TUT_DDR-3.0 Document last updated for Altera Complete Design Suite version:


    Original     		PDF

    PCN1205

    Abstract: EP3C120F780I7N EP4CE30F29I8LN EP4CGX50CF23C8 EP2SGX125GF1508C4 EP3C16F484C8N EP4SGF45I3
    Text: Revision: 1.3.0 PROCESS CHANGE NOTIFICATION P C N1 2 0 5 ADDITIONAL ASSEMBLY SOURCE ASE AND TRANSITION TO CENTER PIN GATE MOLD FOR FBGA PACKAGES Change Description This is an update to PCN1205; please see the revision history table for information specific to this


    Original     		PDF PCN1205; Reco0HF35I4 EP4SGX230HF35I4N EP4SGXHF35I3* EP4SGXKH40I3* EP4SGXKH40I3N* EP4SH40C2N* EP4SGF45I3* EP4SGX290NF45C2 PCN1205 EP3C120F780I7N EP4CE30F29I8LN EP4CGX50CF23C8 EP2SGX125GF1508C4 EP3C16F484C8N EP4SGF45I3

    SATA hard disk controller

    Abstract: sAta to ide Altera 6G FPGA Dev Kit sata connector datasheet hard disk sata II sata controller SAS controller chip sata ddr3 sata controller RAID SATA controller chip
    Text: Understanding 40-nm FPGA Solutions for SATA/SAS WP-01093-2.0 White Paper This white paper describes the SATA and SAS protocols, how the protocols are used, explains the value SATA and SAS in terms of usage in an FPGA, and illustrates how Altera FPGAs can be used to develop a SATA or SAS solution.


    Original     		PDF 40-nm WP-01093-2 SATA hard disk controller sAta to ide Altera 6G FPGA Dev Kit sata connector datasheet hard disk sata II sata controller SAS controller chip sata ddr3 sata controller RAID SATA controller chip

    EP2AGX260

    Abstract: glitch removing ICs for counter signals CLK12 EP2AGX125 EP2AGX190 EP2AGX45 EP2AGX65
    Text: 5. Clock Networks and PLLs in Arria II GX Devices AIIGX51005-3.0 Arria II GX devices provide a hierarchical clock structure and multiple phase-locked loops PLLs with advanced features. Arria II GX devices provide dedicated global clock networks (GCLKs), regional clock networks (RCLKs), and periphery clock


    Original     		PDF AIIGX51005-3 EP2AGX260 glitch removing ICs for counter signals CLK12 EP2AGX125 EP2AGX190 EP2AGX45 EP2AGX65

    EP4CE15

    Abstract: EP4CE22 EP2AGX190 interlaken EP4CGX150 EP4CGX30 EP3SE50 EP4CE30 HC210 EP1C12
    Text: Quartus II Software Version 10.0 SP1 Device Support RN-01057 Release Notes This document provides late-breaking information about device support in the 10.0 SP1 version of the Altera Quartus® II software. For information about disk space and system requirements, refer to the readme.txt file in your


    Original     		PDF RN-01057 EP4CE15 EP4CE22 EP2AGX190 interlaken EP4CGX150 EP4CGX30 EP3SE50 EP4CE30 HC210 EP1C12

    EP2AGX260

    Abstract: EP2AGX190 EP2AGX125 EP2AGX45 EP2AGX65
    Text: 11. JTAG Boundary-Scan Testing AIIGX51011-3.0 This chapter describes the boundary-scan test BST features that are supported in Arria II GX devices. The features are similar to Arria GX devices, unless stated in this document. This chapter includes the following sections:


    Original     		PDF AIIGX51011-3 EP2AGX260 EP2AGX190 EP2AGX125 EP2AGX45 EP2AGX65

    CKE 2009

    Abstract: DDR2 sdram pcb layout guidelines EP4SE360 EP4SGX180 EP4SGX290 EP4SGX360 F572 QDR pcb layout DDR3 pcb layout guide DDR3 sdram pcb layout guidelines
    Text: Section I. Device and Pin Planning 101 Innovation Drive San Jose, CA 95134 www.altera.com EMI_PLAN_PIN-2.0 Document Version: Document Date: 20 July 2010 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other


    Original     		PDF

    5AGXFB3H4F35C5

    Abstract: UG-01062-4 EP4CGX150DF31 5AGX vhdl code lte vhdl code scrambler 5SGXE 5SGXEA7N3F45C4 cyclone4 EP2AGX260FF35
    Text: CPRI MegaCore Function User Guide CPRI MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01062-4.1 Document last updated for Altera Complete Design Suite version: Document publication date: 11.1 November 2011 Subscribe


    Original     		PDF UG-01062-4 5AGXFB3H4F35C5 EP4CGX150DF31 5AGX vhdl code lte vhdl code scrambler 5SGXE 5SGXEA7N3F45C4 cyclone4 EP2AGX260FF35

    AIIGX53001-3

    Abstract: half bridge converter 2kw higig pause frame EP2AGX65 EP2AGX65DF29 HDTV transmitter receivers block diagram 32-Bit Parallel-IN Serial-OUT Shift Register prbs parity checker and generator SILICON General 741 PMD Motion
    Text: Arria II GX Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V1-3.0 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other


    Original     		PDF

    Msi 533 Motherboard

    Abstract: MICRON ddr3 MT41J64M16 latest computer motherboard circuit diagram verilog code for pci express memory transaction MT41J64M16 JES79-3C UniPHY DDR3 "application note" Intel x58 MICRON ddr3 MT41J64M16 application
    Text: PCI Express to External Memory Reference Design AN-431-1.4 Application Note Introduction The Altera PCI Express to External Memory Reference Design provides a sample interface between the Altera PCI Express MegaCore® function and a 64-bit external memory. Altera offers this reference design to demonstrate the operation of the PCI


    Original     		PDF AN-431-1 64-bit Msi 533 Motherboard MICRON ddr3 MT41J64M16 latest computer motherboard circuit diagram verilog code for pci express memory transaction MT41J64M16 JES79-3C UniPHY DDR3 "application note" Intel x58 MICRON ddr3 MT41J64M16 application

    MT41J64M16LA-187E

    Abstract: MT41J64M16LA MT8HTF12864HDY-800G1 design of dma controller using vhdl sodimm ddr3 connector PCB footprint DDR3 DIMM footprint ddr3 Designs guide micron ddr3 MT47H32M16CC-3 temperature controller using microcontroller
    Text: Section I. ALTMEMPHY Design Tutorials 101 Innovation Drive San Jose, CA 95134 www.altera.com EMI_TUT_DDR-2.0 Document Version: Document Date: 2.0 July 2010 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other


    Original     		PDF

    HD-SDI over sdh

    Abstract: GR-253-CORE PRBS31 SMPTE292M SSTL-15 SSTL-18
    Text: 1. Arria II GX Device Datasheet AIIGX53001-3.0 This chapter describes the electrical and switching characteristics of the Arria II GX device family. This chapter contains the following sections: • “Electrical Characteristics” on page 1–1 ■ “Switching Characteristics” on page 1–12


    Original     		PDF AIIGX53001-3 HD-SDI over sdh GR-253-CORE PRBS31 SMPTE292M SSTL-15 SSTL-18

    Untitled

    Abstract: No abstract text available
    Text: Arria II GX Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V1-2.0 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other


    Original     		PDF

    EP2AGX260EF

    Abstract: "switch power supply" handbook
    Text: Arria II GX Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V1-1.1 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other


    Original     		PDF

    EP4CE6 package

    Abstract: EP4CE40 Altera EP4CE6 EP4CE55 5M240Z 5M1270Z QFN148 5m570z 5M40 5M80
    Text: Package Information Datasheet for Altera Devices DS-PKG-16.3 This datasheet provides package and thermal resistance information for Altera devices. Package information includes the ordering code reference, package acronym, leadframe material, lead finish plating , JEDEC outline reference, lead


    Original     		PDF DS-PKG-16 EP4CE6 package EP4CE40 Altera EP4CE6 EP4CE55 5M240Z 5M1270Z QFN148 5m570z 5M40 5M80

    schematic diagram atx Power supply 500w

    Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
    Text: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455


    Original     		PDF P462-ND P463-ND LNG295LFCP2U LNG395MFTP5U US2011) schematic diagram atx Power supply 500w pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS

    9a21

    Abstract: No abstract text available
    Text: Arria II Device Handbook Volume 1: Device Interfaces and Integration Arria II Device Handbook Volume 1: Device Interfaces and Integration 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V1-4.4 Document last updated for Altera Complete Design Suite version:


    Original     		PDF

    Arduino Mega2560

    Abstract: 13001 S 6D TRANSISTOR arduino uno rev 3 agilent optical encoder 9988 MZ 13001 TRANSISTOR arduino mega 2650 skiip 613 gb 123 ct arduino sound sensor module pic arduino nano mc34063l
    Text: ND3% BASE1 XXXX2108-0010-1-P 10 TSQ: 3001 CMS: CMS-USM TS host OP: NN COMP: 15-07-11 Hour: 13:07 TS:TS date TS time MCUS, MPUS, DSPS & DEVELOPMENT TOOLS Find Datasheets Online 8-BIT MCUS & DEVELOPMENT TOOLS 1 PSoC 3 DEVELOPMENT KITS ARDUINO MCU DEVLOPMENT PLATFORM


    Original     		PDF CY8C38 CY8C29 incl795 12T9797 12T9804 12T9803 12T9800 12T9802 12T9801 12T9805 Arduino Mega2560 13001 S 6D TRANSISTOR arduino uno rev 3 agilent optical encoder 9988 MZ 13001 TRANSISTOR arduino mega 2650 skiip 613 gb 123 ct arduino sound sensor module pic arduino nano mc34063l

    Untitled

    Abstract: No abstract text available
    Text: Arria II Device Handbook Volume 1: Device Interfaces and Integration Arria II Device Handbook Volume 1: Device Interfaces and Integration 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V1-4.3 Document last updated for Altera Complete Design Suite version:


    Original     		PDF

    5AGX

    Abstract: lpddr2 tutorial EP4CE22F17 solomon 16 pin lcd display 16x2 Altera MAX V CPLD DE2-70 vhdl code for dvb-t 2 fpga based 16 QAM Transmitter for wimax application with quartus altera de2 board sd card AL460A-7-PBF
    Text: Version 11.0 Altera Product Catalog Contents Glossary. 2 Stratix FPGA Series. 3 HardCopy® ASIC Series. 17 Arria® FPGA Series. 21


    Original     		PDF SG-PRDCT-11 5AGX lpddr2 tutorial EP4CE22F17 solomon 16 pin lcd display 16x2 Altera MAX V CPLD DE2-70 vhdl code for dvb-t 2 fpga based 16 QAM Transmitter for wimax application with quartus altera de2 board sd card AL460A-7-PBF

    HD-SDI over sdh

    Abstract: GR-253-CORE PRBS31 SMPTE292M SSTL-15 SSTL-18 PRBS-15
    Text: Section I. Arria II GX Device Data Sheet and Addendum This section provides information about the Arria II GX device data sheet and addendum. This section includes the following chapters: • Chapter 1, Arria II GX Device Datasheet ■ Chapter 2, Addendum to the Arria II GX Device Handbook


    Original     		PDF