EP2S30 PINOUT Search Results
EP2S30 PINOUT Result Highlights (5)
Part | ECAD Model | Manufacturer | Description | Download | Buy |
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TL391BQDBVRQ1 |
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Automotive grade, 36-V, single comparator with alternative pinout 5-SOT-23 -40 to 125 |
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SN65LVDS048ADG4 |
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Quad LVDS Receiver with Flow-Through Pinout 16-SOIC -40 to 85 |
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SN65LVDS047PWG4 |
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Quad LVDS Driver with Flow-Through Pinout 16-TSSOP -40 to 85 |
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TMP75BQDGKRQ1 |
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Automotive Grade, 1.4V-Capable Temperature Sensor with I2C/SMBus Interface in LM75 Pinout 8-VSSOP -40 to 125 |
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ISO6721RBDR |
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General-purpose, dual-channel, 1/1 reverse pinout digital isolator 8-SOIC -40 to 125 |
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EP2S30 PINOUT Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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bga 529
Abstract: EP2S15 EP2S180 EP2S30 EP2S60 EP2S90 fpga stratix II ep2s180
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SII51001-1 90-nm, 18-bit 18-bit) 484-Pin 672-Pin 780-Pin 020-Pin 508-Pin bga 529 EP2S15 EP2S180 EP2S30 EP2S60 EP2S90 fpga stratix II ep2s180 | |
bga 529
Abstract: EP2S15 EP2S180 EP2S30 EP2S60 EP2S90
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SII51001-1 90-nm, 18-bit 18-bit) EP2S15 484-Pin 672-Pin EP2S30 508-Pin EP2S60 bga 529 EP2S15 EP2S180 EP2S30 EP2S60 EP2S90 | |
EP2S60F1020C5N
Abstract: EP2S30F672I4 EP2S130F1020C3N EP2S60F672I4N EP2S30F484I4 EP2S30F672C5N ep2S30F672C4N
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Strat2S180F1020C5 EP2S180F1020C5N EP2S180F1508C3 EP2S180 EP2S180F1508C3N EP2S180F1508C4 EP2S180F1508C4N EP2S180F1508C5 EP2S180F1508C5N EP2S180F1020I4 EP2S60F1020C5N EP2S30F672I4 EP2S130F1020C3N EP2S60F672I4N EP2S30F484I4 EP2S30F672C5N ep2S30F672C4N | |
bst 1046
Abstract: Datasheet Library 1979 S 1854 8 bit Array multiplier code in VERILOG class 10 up board Datasheet 2012 CMOS applications handbook sensor 3414 vhdl code for FFT 32 point EP2S15 EP2S180
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QDR pcb layout
Abstract: verilog code fo fft algorithm
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EP2S60F
Abstract: OV 5642 27631 VHDL fpga stratix II ep2s180
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General Electric Semiconductor Data Handbook
Abstract: D 1609 VO A1 Datasheet Library 1979 S 1854 bst 1046 class 10 up board Datasheet 2012 CMOS applications handbook d 1878 DATA SHEET sensor 3414 toggle switches 2041 BY
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EP2S15
Abstract: EP2S180 EP2S30 EP2S60 EP2S90 A 27631 transistor
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EP2AGX260
Abstract: EP4SGX70 EP2AGX45 EP2AGX125 EP2AGX190 EP2AGX65 EP4SE530 DSP Models HC210 receiver LVDS_rx
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RN-01043-1 EP2AGX260 EP4SGX70 EP2AGX45 EP2AGX125 EP2AGX190 EP2AGX65 EP4SE530 DSP Models HC210 receiver LVDS_rx | |
8 bit Array multiplier code in VERILOGContextual Info: Stratix II Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 408 544-7000 www.altera.com SII5V1-4.1 Copyright 2006 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and |
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Contextual Info: Stratix II Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 408 544-7000 www.altera.com SII5V1-4.2 Copyright 2006 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and |
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EP2S30
Abstract: EP2S60 EP2S90 EP2S15 EP2S180 I747 verilog code fo fft algorithm 16 bit Array multiplier code in VERILOG TI 783
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vhdl code for FFT 32 point
Abstract: bst 1046 sensor 3414 EP2S15 EP2S30 EP2S60 P941
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diode 226 16k 718
Abstract: EP2S15 EP2S180 EP2S30 EP2S60 EP2S90 vhdl for 8 bit lut multiplier ripple carry adder fpga stratix II ep2s180
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verilog sample code for max1619
Abstract: ep2s60f1020c5n EP2S60F484C4 pin diagram EP2S90F1020C3 verilog code for crossbar switch EP2S60F672I4N
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be2S60F1020C3N EP2S60F1020C4 EP2S60F1020C4N EP2S60F1020C5 EP2S60F1020C5N EP2S60F484I4 EP2S60F484I4N EP2S60F672I4 EP2S60F672I4N EP2S60F1020I4 verilog sample code for max1619 EP2S60F484C4 pin diagram EP2S90F1020C3 verilog code for crossbar switch | |
EP2S90F1020C5
Abstract: EP2S90F1020C3
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EP2S30F484C3 EP2S30 EP2S30F484C4 EP2S30F484C5 EP2S30F672C3 EP2S30F672C4 EP2S30F672C5 EP2S30 EP2S90F1020C5 EP2S90F1020C3 | |
hc240f1020
Abstract: HC230F HC210 EP2S180 EP2S30 EP2S60 EP2S90 HC220 HC230 HC240
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ASIC--HC210 HC220, hc240f1020 HC230F HC210 EP2S180 EP2S30 EP2S60 EP2S90 HC220 HC230 HC240 | |
hc322
Abstract: EP3C5 EP4SE230 HC371 LVDS_RX EP3SE50 EP4SE530 HC210 receiver LVDS_rx EP2AGX190
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RN-01045-1 hc322 EP3C5 EP4SE230 HC371 LVDS_RX EP3SE50 EP4SE530 HC210 receiver LVDS_rx EP2AGX190 | |
Contextual Info: Section I. Stratix II Device Family Data Sheet This section provides designers with the data sheet specifications for Stratix II devices. They contain feature definitions of the internal architecture, configuration and JTAG boundary-scan testing information, |
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1553 VHDL
Abstract: class 10 up board Datasheet 2012 PS 229 T M 2313 SII5V1-2 CMOS applications handbook T 2109 verilog code pipeline ripple carry adder vhdl code for FFT 32 point EP2S15
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EP2AGX190
Abstract: EP3CLS200 EP2AGX125 EP4SE230 EP4SE530 EP2AGX260 HC210 EP2AGX45 EP3CLS150 EP3CLS70
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RN-01047-1 EP2AGX190 EP3CLS200 EP2AGX125 EP4SE230 EP4SE530 EP2AGX260 HC210 EP2AGX45 EP3CLS150 EP3CLS70 | |
transistor 2A97Contextual Info: Section I. Stratix II Device Family Data Sheet This section provides designers with the data sheet specifications for Stratix II devices. They contain feature definitions of the internal architecture, configuration and JTAG boundary-scan testing information, |
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Contextual Info: Section I. Stratix II Device Family Data Sheet This section provides designers with the data sheet specifications for Stratix II devices. They contain feature definitions of the internal architecture, configuration and JTAG boundary-scan testing information, |
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T M 2313
Abstract: class 10 up board Datasheet 2012 verilog code pipeline ripple carry adder vhdl code for FFT 32 point EP2S15 EP2S180 EP2S30 EP2S60 EP2S90 T432
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