ESE CPW Search Results

SCPB

Abstract: 2399C MKPX6 gpib 10/100 lg audio mkds yig oscillator 100MHZ 10DB 50MHZ
Contextual Info: Contents 2399C Spectrum Analyzer Programming Manual Note 2399C uses the identical command set to 2399B instruments. Hence references in this manual to ‘2399B‘ apply equally to ‘C’ versions. Aeroflex International Ltd. 2007 No part of this document may be reproduced or transmitted in any form

D 2394

Abstract: te 2395 transistor D 2394 bdl 494 yig oscillator MKPX 2395A TM 1628 driver display SA97 mkds
Contextual Info: 2394A/2395A Spectrum Analyzers Programming Manual Note 2394A and 2395A use the identical command set to 2394 and 2395 instruments. Hence references in this manual to ‘2394 ‘ and ‘2395’ apply equally to ‘A’ versions. Aeroflex International Ltd. 2007

p382x

Abstract: airport radar smd diode 9j
Contextual Info: WAffi H E W L E T T milHMP A C K A R D Low Cost Surface M ount P ow er Lim iters Application Note 1050 Abstract M any receivers are often a t risk of h avin g their front ends burned out by high power RF and microwave stray signals. T his paper presents practical

MSM51V16100

Contextual Info: O K I Semiconductor MSIWI51V16100_ 16,777,216-Word x 1-Bit DYNAMIC RAM : FAST PAGE MODE TYPE DESCRIPTION The M SM 51V 16100 is a new generation d y n am ic o rgan ized as 16,777,216-w o rd x 1-bit. The technology used to fabricate the M S M 51V I6100 is OKI's C M O S silicon g ate process technology.

bq2054

Contextual Info: rui UNITRODE _ bq2054 Lithium Ion Fast-Charge 1C Features General Description >* S a fe charge o f L ith iu m Ion b a t­ tery pack s T h e b q 2 0 5 4 L i t h i u m Io n F a s t C h arge IC is d esign ed to optim ize c h a r g in g o f lith iu m ion L i-Io n

BQ2031

Contextual Info: _ bq2031 BENCHMARQ Lead-Acid Fast Charge IC >• Pulse-w idth m odulation control Features - ► Conforms to b attery m anufacturers’ charge recom m endations for cyclic and float charge >■ P in selectable charge algorithm s - Two-Step Voltage w ith

circuit diagram of card lock system using ic 74ls

Abstract: T1017 mfm decoder SCJRI 21-CLOCK of op-amp LF 398 P6460 tr 84603
Contextual Info: DP8460/DP8450 National Semiconductor DP8460 Data Separator/DP8450 Data Synchronizer General Description Th e DP8460 Data Separator is designed for application in disk drive memory system s, and depending on system re­ quirem ents, m ay be located either in the drive or in the con­

BQ2031

Contextual Info: _ bq2031 | ^ j BENCHMARQ Lead-Acid Fast Charge IC >• Pulse-width modulation control Features - >■ Conforms to battery manufacturers’ charge recommendations for cyclic and float charge > Pin selectable charge algorithms - Two-Step Voltage with

Contextual Info: H M 5 1 1 6 1 0 0 L S e r i e s LowPower Version Product Preview 16,777,216-Word x 1-Bit Dynamic Random A c c e s s Memory • DESCRIPTION H M 5116100L J Series The Hitachi HM 5116100 is a C M O S dynamic RAM organized 16,777,216 words x 1-bit. It employs the most advanced C M O S technology lor high performance and

A302 x6

Abstract: TC5116
Contextual Info: 65,536 W O R D x 16 BIT D Y N A M I C R A M DESCRIPTION T h e T C 5 1 1 6 6 4 J / Z i s t h e n e w g e n e r a t i o n d y n a m i c R A M o r g a n i z e d 6 5 , 5 3 6 w o r d s by 16 bi t s. The T C 5 1 1 6 6 4 J / Z u t i l i z e s T O S H I B A ' S C M O S S i l i c o n g a t e p r o c e s s t e c h n o l o g y a s w el l a s a d v a n c e d c i r c u i t

Contextual Info: _ bq2054 BENCHMARQ Lithium Ion Fast-Charge 1C Features General Description >- S afe c h arg e of L ith iu m Io n b a t ­ te r y p acks T h e b q 2 0 5 4 L ith iu m Io n F a s tC h a rg e IC is d e sig n ed to optim ize c h a r g i n g o f l i t h i u m io n L i-I o n

g16b

Abstract: D71613 TGWR
Contextual Info: N EC ELECTRONICS INC Tfi D 1b457SS5 0015^3 □ D T ^ S 2 t S 5 -C 3 |iPD71613 CMOS Bus C o n t r o l l e r P r e l im in a r y I n f o r m a t io n Description Pin Configuration The n P D 7 1 6 1 3 is a high performance C M O S bus controller for the nPD70616 V60 microprocessor. The

FR-T1A

Contextual Info: _ bq2054 BENCHMARQ Lithium Ion Fast-Charge 1C Features General Description >• S afe c h arg e o f L ith iu m Io n b a t ­ te r y p acks T h e b q 2 0 5 4 L ith iu m Io n F a s tC h a rg e IC is d e sig n ed to optim ize c h a r g i n g o f l i t h i u m io n L i-I o n

Contextual Info: • « Y U N O Ä T • HY51V17400B,HY51 V16400B 4Ux4, Fast Page mode DESCRIPTION This fam ily is a 16M bit dynamic RAM organized 4,194,304 x 4-bit configuration with Fast Page mode CMOS DRAMs. Fast Page mode is a kind of page mode which is useful for the read operation. The circuit and process design allow this

Contextual Info: M g L M ic r o February 1997 PRELIMINARY L in e a r ML4423 3-Phase and Single/2-Phase Variable Speed AC Induction Motor Controller GENERAL DESCRIPTION FEATURES The ML4423 AC induction motor controller provides the PWM sinewave waveforms necessary for controlling three

Contextual Info: High P erform ance 1MX4 CMOS DRAM H A S4C14405 Il IM X 4 C M 0 S EDO DRAM Preliminary information Features • 1024 refresh cydes, 16 ms refresh interva • Organization: 1,048,576 words x 4 bit • High speed - RAS-only o r CAi>-before-RAS refresh • Read-modify-write

Contextual Info: G A Z E LL E M I C R O C I R C U I T S INC S'ÎE ]> • 3fl3bOB5 OOOOO'îl ô W Ê G k l T^i-OD r m Q A 121OE Low-Skew TTL Clock Doubler Two-Phase Clock Generator J è gazelle General Description Features Gazelle's GA1210E is a low-skew TTL-level clock doubler chip. It

tmm27256ad

Abstract: TC53257P TC57256AD TC57256AD-12 TC57256AD-120 TMM23256P
Contextual Info: ïliillS ill mllÊÊÊÈÈ 32,768 WORD x 8 BIT CMOS UV ERASABLE AND ELECTRICALLY PROGRAMMABLE READ ONLY MEMORY PRELIMINARY ¡DESCRIPTION] The TC57256AD is a 32,768 word x 8 bit CMOS ultraviolet light erasable and electri­ cally programmable read only memory. For read operation, the TC57256AD' s access time

BQ2031

Contextual Info: bq2031 BENCHMARQ Lead-Acid Fast-Charge IC Features - Ideal for high-efficiency switch-mode power conversion >• Conforms to b attery m an u factu r­ ers' charge recom m endations for cyclic an d float charge >- Pin-selectable charge algorithm s - Two-Step Voltage w ith

BENCHMARQ MICROELECTRONICS

Abstract: BQ2031
Contextual Info: _ bq2031 BENCHMARQ Lead-Acid Fast-Charge IC Features - Ideal for high-efficiency switch-mode power conversion >• Conforms to b attery m an u factu r­ ers' charge recom m endations for cyclic an d float charge >- Pin-selectable charge algorithm s

IRS11

Abstract: ire5
Contextual Info: H D 6 3 1 4 - Universal Pulse Processor UPP Description 24 16-bit universal reg isters (UDR) 16 I/O term in als (8 in tern al reg isters for pulse I/O control are also provided) In terru p ts ca n occur a t th e fallin g or ris­

chqb

Abstract: HY51V16164B
Contextual Info: •HYUNDAI HY51V16164B Series 1M x 16-bit CMOS DRAM with Extended Data Out DESCRIPTION The H Y51V 16164B is the new generation and fast dynamic RAM organized 1,048,576 x 16-bit. The HY51V16164B utilizes Hyundai's CM OS silicon gate process technology as well as advanced circuit techniques

4096D

Abstract: 40964
Contextual Info: 4096 4096x 1 DYNAMIC RANDOM ACCESS MEMORY G E N E R A L DES C R IP TIO N — The 4096D C is a 4096 b it dynam ic Random Access Mem o ry organized as 4096 one -b it words. This device is designed u tiliz in g the single transistoi dynam ic m em ory cell. A unique address m u ltip le xin g and latching technique perm its the packaging o f the

TDA 7240 equivalent

Abstract: TDA 7240 pin diagram
Contextual Info: ^^PÌ|^^§ÌPS!H1Ì!|Ì|PIPS§I§|ÌSÌS TOSHIBA % L O G I C / M E M O R Y ^7240 0Q2QÔÛ4 S * T 0 S 2 8 4,194,304 WORD x 1 BIT fiYNAMIC RAM * This is advanced information and specifications are subject to change without notice. 7 " ^ ¿ - “2 3 - / S ’"