F24L Search Results

mwas

Abstract: M51403FP
Contextual Info: To all our customers Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp. The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog

Contextual Info: 646 • 648 54F/74F646 • 54F/74F648 Connection Diagrams Octal Transceiver/Register With 3-State Outputs CPA B pr Descriptffen J5] cpba DIR|~3~ ~22\ SBA a ,[ t T hese d e v ice s c o n s is t of bus tran sceiver c irc u its with 3-state or openc o lle c to r outputs, D-type,flig:flops, and control circu itry arranged for

Contextual Info: Revised A ugust 1999 E M IC O N D U C T G R T M 74F827 • 74F828 10-Bit Buffers/Line Drivers General Description Features The 74F 827 and 74F828 10-bit bus buffers provide high perform ance bus interface buffering for w ide data/address paths or buses carrying parity. The 10-bit buffers have

Contextual Info: A I R C H I L D p PriM 9H8 !! i QQQ R e v is e d A u g u s t 1 9 9 9 EMICONDUCTGRTM General Description Features T h e 7 4 F 6 7 3 A c o n ta in s a 1 6 -b it s e ria l-in , s e ria l-o u t s h ift • S e ria l-to -p a ra lle l c o n v e rte r re g is te r a n d a 1 6 -b it P a ra lle l-O u t s to ra g e re g is te r. A s in g le

nicomatic cmm 221

Abstract: K1692 nicomatic pin
Contextual Info: NICOMATIC - FRANCE Headquarters : NICOMATIC SA 173, rue des Fougères - Zone Industrielle les Bracots - F-74890 BONS-EN-CHABLAIS Tel. +33 0 4 50 36 13 85 - Fax +33 (0)4 50 36 11 33 http://www.nicomatic.fr - Email : nicomatic@nicomatic.fr NICOMATIC - SUBSIDIARIES

Contextual Info: A I R C H I L D p PriM9H8!! i QQQ Revised A ugust 1999 EMICONDUCTGRTM 74F845 8-Bit Transparent Latch General Description Features T h e 74F 845 bus interface latch is designed to elim inate the extra packages required to buffer existing latches and pro­ vide extra data w idth fo r w id e r address/data paths o r buses

f24l

Abstract: 74*676
Contextual Info: Revised A ugust 1999 EMICONDUCTGRTM 74F676 16-Bit Serial/Parallel-ln, Serial-Out Shift Register General Description Features The 74F 676 contains 16 flip-flops with provision for syn ­ chronous parallel or serial entry and serial output. W hen the M ode M input is HIGH, inform ation present on the

RXIDF 2H

Abstract: RXIDF asea ri 5A relay BROWN BOVERI protection relay rxidf2h RK473 RK473 004 rxidf-2h BROWN BOVERI HE RK65
Contextual Info: Catalogue RK 47-11 E Edition 2 , 1&Ê1-03 File Ft, Part 1 ASEA BROWN BOVERi Time-lag overcurrent relay type RX1DF 2H • Starting, instantaneous and defayed operation wftti individual settings . • Reconnectibte to r 0-1,0.2, :0>5 and 1. A o r tar 0.5, -1,2,6 and

pj 899 diode

Abstract: UPD6320G MPD6321 UPD6321G PD6320G 701-c iPD6321 UPB553AC UPD6321 JUPD6320G
Contextual Info: M O S INTEGRATED C IR C U IT ju P D 1 7 0 1 C - 0 1 5 PLL F R E Q U E N C Y S Y N T H E S IZ E R A N D C O N T R O L L E R FO R F M A N D A M R A D IO The /JPD1701C-015 is a CMOS LSI w ith b u ilt-in PLL synthesizer capable of receiving F M /A M in U.S.A. and

Contextual Info: Dimension Tables CMM 100/200 SERIES CMM Specifications with LF contacts Manufacturer and designer of innovative interconnect solutions MATERIALS in male & female styles for LF contacts INSULATOR: Special PPS (Polyphenylene Sulfide Fiberglass filled thermoplastic) UL 94-V0

74ACQ657

Abstract: 74ACQ657SPC 74ACTQ657 74ACTQ657SC 74ACTQ657SPC M24B MS-013 N24C
Contextual Info: January 1990 Revised D ecem ber 1999 _ _ _ _ _ _ _ _ _ _ _ _ _ S E M I C O N D U C T O R TM 74ACQ657 • 74ACTQ657 Quiet Series Octal Bidirectional Transceiver with 8-Bit Parity Generator/Checker and 3-STATE Outputs General Description Features

Contextual Info: Flat cable connector system 57 Ribbon TECHNICAL DATA Current rating: Contact material: Contact plating: Insulator material: Shell: Temperature rating: 5A phosphor bronce gold over nickel Polyamid UL 94 V-0 steel, tin-plated - 55° C to + 125° C Plug connector

gal programming algorithm

Abstract: XOR en TTL gal9 opal GAL20V8Q
Contextual Info: ^ National ÉM Semiconductor NATL SEMICOND M EM ORY NSC3 February 1992 r -v < -/? -0 7 GAL20V8QS 24-Pin Generic Array Logic Family General Description Features The EECMOS GAL QS devices combine a high per­ formance CMOS process with electrically erasable floating

Contextual Info: p P r iM 9 H 8 ! ! iQ Q Q R e v is e d A u g u s t 1 9 9 9 EMICONDUCTGRTM 74F269 8-Bit Bidirectional Binary Counter General Description The 74F269 is a c o u n te r fe a tu rin g fu lly Features s y n c h ro n o u s 8 -s ta g e u p /d o w n a p re s e t c a p a b ility fo r p ro g ra m m a b le