FLIP-FLOP 555 Search Results

Contextual Info: M MOTOROLA Military 100E531 4-Bit D Flip-Flop Product Preview ELECTRICALLY TESTED PER: 100E531 The 100E531 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock (Cc) LOW and using the Clock Enable (CE) inputs for clocking. Common clocking is

100E531

Contextual Info: M M O T O R O L A Military 100E531 4-Bit D Flip-Flop Product Preview ELECTRICALLY TESTED PER: 100E531 T h e 100E531 is a quad m aster-slave D-type flip-flop with differential outputs. Each flip-flop m ay be clocked separately by holding Com mon Clock (C c ) LO W

Contextual Info: MOTOROLA M C74A C 109 M C 74A C T109 Dual J K Positive Edge-Triggered Flip-Flop DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP The MC74AC109/74ACT109 consists of two high-speed completely Independent transition clocked JK flip-flops. Thej:locking operation Is independent of rise and fall

Contextual Info: Philips Somiconductors-Signofics Document No. 853-0166 ECN No. 96169 Date of issue November 27,1989 Status Product Specification FAST Products FAST 74F563, 74F564 Latch/Flip-Flop 74F563 Octal Transparent Latch 3-State 74F564 Octal D Flip-Flop (3-State) TYPE

max2929

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA D ifferential Clock D Flip-Flop MC10EL51 MC100EL51 The MC10EL/100E:L51 is a differential clock D flip-flop with reset. The device is functionally similar to the E151 device with higher performance capabilities. With propagation delays and output transition times

Contextual Info: gl M O T O R O L A M C74AC109 M C 74A C T109 Dual J K Positive Edge-Triggered Flip-Flop DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP The MC74AC109/74ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. T h ejtocking operation is independent of rise and fall

Contextual Info: M OTOROLA SEMICONDUCTOR TECHNICAL DATA Differential Clock D Flip-Flop MC10EL51 MC100EL51 The MC10EL/100EL51 is a differential clock D flip-flop with reset. The device is functionally similar to the E151 device with higher performance capabilities. With propagation delays and output transition times

Contextual Info: *SYNERGY SY10EL51 SY100EL51 DIFFERENTIAL CLOCK D FLIP-FLOP SEMICONDUCTOR DESCRIPTION FEATURES • 475ps propagation delay T he SY10/100EL51 are differential clock D flip -flop s with reset. T hese devices are fun ction a lly sim ila r to the E151 devices, with higher perform ance capabilities. With

Contextual Info: 377 CO NNECTIO N DIAGRAM PINOUT A 54LS/74LS377 b / / S V 3 OCTAL D FLIP-FLOP With Common Enable and Clock DESCRIPTION — The '377 is an 8-bit register built using advanced low power S chottky technology. This register consists of eight D-type flip -flop s with a

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Differential Clock D Flip-Flop MC10EL51 MC100EL51 The MC10EL7100EL51 is a differential clock D flip-flop with reset. The device is functionally sim ilar to the E151 device with higher perform ance ca pabilities. W ith propagation delays and output tra n sitio n tim es

LGA 1150 Socket PIN diagram

Abstract: LGA 1155 Socket PIN diagram 04/LGA 1150 Socket PIN diagram 16 pins qfn 3x3 footprint LGA-16 3x3 socket lga 1155 pinout lga 1155 socket 1155 lga socket pins LGA16 3x3 footprint
Contextual Info: NBSG53A 2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS* The NBSG53A is a multi-function differential D flip-flop DFF or fixed divide by two (DIV/2) clock generator. This is a part of the GigaComm family of high performance Silicon Germanium

lga 1155

Abstract: 1155 lga socket LGA 1155 PIN diagram LGA 1150 Socket PIN diagram LGA 1155 Socket PIN diagram lga 1155 socket NBSG53AMA1TBG 1155 lga socket pins LGA16 3x3 footprint LGA-16
Contextual Info: NBSG53A 2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS* The NBSG53A is a multi-function differential D flip-flop DFF or fixed divide by two (DIV/2) clock generator. This is a part of the GigaComm family of high performance Silicon Germanium

74ACTQ534

Contextual Info: 50 Semiconductor National ÆM 54ACQ/74ACQ534«54ACTQ/74ACTQ534 Quiet Series Octal D Flip-Flop with TRI-STATE Outputs General Description Features The ’AC Q /’ACTQ534 is a high-speed, low-power octal Dtype flip-flop featuring separate D-type inputs for each flipflop and TRI-STATE outputs for bus-oriented applications. A

qfn 3x3 tray dimension

Abstract: tray bga PEAK TRAY QFN 4x4 16-QFN 485G NBSG53A QFN-16
Contextual Info: NBSG53A 2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS* The NBSG53A is a multi-function differential D flip-flop DFF or fixed divide by two (DIV/2) clock generator. This is a part of the GigaComm family of high performance Silicon Germanium

Contextual Info: b3b?252 OQTHBOG Ô2b « M O m bbE D MOTOROLA SC LOGIC MOTOROLA MC74AC109 MC74ACT109 Dual JK Positive Edge-TViggered Flip-Flop DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP The M C 74A C 10 9 /7 4 A C T 109 consists of tw o high-speed co m ple te ly independent

Contextual Info: * DIFFERENTIAL CLOCK D FLIP-FLOP SYNERGY S E M IC O N D U C TO R SY10EL51 SY100EL51 DESCRIPTION FEATURES • 475ps propagation delay T he SY10/100EL51 are diffe re n tia l clock D flip -flop s with reset. T hese devices are fu n ction a lly sim ila r to the

Contextual Info: NLSF1174 Product Preview Hex D Flip-Flop with Common Clock and Reset This device consists of six D flip–flops with common Clock and Reset inputs. Each flip–flop is loaded with a low–to–high transition of the Clock input. Reset is asynchronous and active low. All

E151

Abstract: SY100EL51ZC SY10EL51 SY10EL51ZC flip-flop 555
Contextual Info: *SYNERGY PRELIMINARY SY10EL51 SY100EL51 DIFFERENTIAL CLOCK D FLIP-FLOP SEMICONDUCTOR FEATURES_ • DESCRIPTION ■ 475ps propagation delay ■ 2.8GHz toggle frequency The SY10EL/100EL51 are differential clock D flip-flops with reset. These devices are functionally sim ilar to the

Contextual Info: *SYNERGY PRELIMINARY SY10EL51 SY100EL51 DIFFERENTIAL CLOCK D FLIP-FLOP SEMICONDUCTOR DESCRIPTION FEATURES • 475ps propagation delay The SY10EL/100EL51 are differential clock D flip-flops with reset. These devices are functionally similar to the E151 devices, with higher performance capabilities. With

485G

Abstract: 555C NLSF1174 QFN-16
Contextual Info: NLSF1174 Hex D Flip−Flop with Common Clock and Reset This device consists of six D flip-flops with common Clock and Reset inputs. Each flip-flop is loaded with a low-to-high transition of the Clock input. Reset is asynchronous and active low. All inputs/outputs are standard CMOS compatible.

Contextual Info: NLSF1174 Hex D Flip−Flop with Common Clock and Reset This device consists of six D flip-flops with common Clock and Reset inputs. Each flip-flop is loaded with a low-to-high transition of the Clock input. Reset is asynchronous and active low. All inputs/outputs are standard CMOS compatible.

Contextual Info: co s &N a t i o n a l Semiconductor 74ABT377 Octal D-Type Flip-Flop with Clock Enable General Description The ’ABT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP input loads all flip-flops simultaneously, when the

HEL51

Contextual Info: SY10EL51 SY100EL51 FINAL DIFFERENTIAL CLOCK D FLIP-FLOP DESCRIPTION FEATURES • ■ ■ ■ 475ps propagation delay 2.8GHz toggle frequency Internal 75KΩ input pull-down resistors Available in 8-pin SOIC package The SY10/100EL51 are differential clock D flip-flops

E151

Abstract: SY100EL51 SY100EL51ZC SY10EL51 SY10EL51ZC SY10EL51ZCTR
Contextual Info: SY10EL51 SY100EL51 FINAL DIFFERENTIAL CLOCK D FLIP-FLOP DESCRIPTION FEATURES • ■ ■ ■ 475ps propagation delay 2.8GHz toggle frequency Internal 75KΩ input pull-down resistors Available in 8-pin SOIC package The SY10/100EL51 are differential clock D flip-flops