HD12-6.8-A G Search Results

W3060

Abstract: HD15-6
Contextual Info: File E131905 Vol. 1 Sec. 74 and Report Page 1 Issued: Revised: 01-13-00 02-27-02 DESCRIPTION PRODUCT COVERED: USR/CNR - Linear Power Supply, Models HCAA-60W-A, HD5-12/OVP, HD12-6.8, HD15-6, HD24-4.8, HD28-4, HD48-3, followed by suffix -A. Suffixes after the

Contextual Info: Mixed-Signal Front-End MxFE Baseband Transceiver for Broadband Applications AD9863 FEATURES FUNCTIONAL BLOCK DIAGRAM VIN+A ADC DATA MUX AND LATCH VIN–A VIN+B ADC Rx DATA VIN–B I/O INTERFACE CONFIGURATION BLOCK LOW-PASS INTERPOLATION FILTER I/O INTERFACE

axp 193

Abstract: AXP 209 Datasheet AXP 209 AXP 202 AD38 HA25 TFB2022A HA15 HA16 HA11
Contextual Info: TFB2022AM FUTUREBUS+ DATA PATH UNIT SGLS072A – JANUARY 1992 – REVISED MARCH 1994 D D D D D D Parallel-Protocol Support Is Fully Compliant to Futurebus+ Standard IEEE Std 896.1–1991 Interfaces to a Variety of Popular Microprocessors Such as SPARC, 680x0,

SPRS186B

Abstract: pin diagram for TMS320C6713
Contextual Info: TMS320C6713 FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR SPRS186B – DECEMBER 2001 – REVISED NOVEMBER 2002 D D D D D D Signal Processor DSP : TMS320C6713 – Eight 32-Bit Instructions/Cycle – 32/64-Bit Data Word – 225-MHz (GDP), 150-MHz (PYP) Clock Rates

Contextual Info: TMS320C6711, TMS320C6711B, TMS320C6711C FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SPRS088N − FEBRUARY 1999 − REVISED AUGUST 2005 D Excellent-Price/Performance Floating-Point D D D D D D 32-Bit External Memory Interface EMIF Digital Signal Processors (DSPs):

Contextual Info: TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SPRS088M − FEBRUARY 1999 − REVISED FEBRUARY 2005 D Excellent-Price/Performance Floating-Point D D D D D Digital Signal Processors DSPs : TMS320C67x (C6711, C6711B, C6711C,

Contextual Info: TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SPRS088M − FEBRUARY 1999 − REVISED FEBRUARY 2005 D Excellent-Price/Performance Floating-Point D D D D D Digital Signal Processors DSPs : TMS320C67x (C6711, C6711B, C6711C,

Contextual Info: TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SPRS088M − FEBRUARY 1999 − REVISED FEBRUARY 2005 D Excellent-Price/Performance Floating-Point D D D D D Digital Signal Processors DSPs : TMS320C67x (C6711, C6711B, C6711C,

Contextual Info: TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SPRS088M − FEBRUARY 1999 − REVISED FEBRUARY 2005 D Excellent-Price/Performance Floating-Point D D D D D Digital Signal Processors DSPs : TMS320C67x (C6711, C6711B, C6711C,

Contextual Info: TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SPRS088M − FEBRUARY 1999 − REVISED FEBRUARY 2005 D Excellent-Price/Performance Floating-Point D D D D D Digital Signal Processors DSPs : TMS320C67x (C6711, C6711B, C6711C,

Contextual Info: TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SPRS088M − FEBRUARY 1999 − REVISED FEBRUARY 2005 D Excellent-Price/Performance Floating-Point D D D D D Digital Signal Processors DSPs : TMS320C67x (C6711, C6711B, C6711C,

Contextual Info: TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SPRS088M − FEBRUARY 1999 − REVISED FEBRUARY 2005 D Excellent-Price/Performance Floating-Point D D D D D Digital Signal Processors DSPs : TMS320C67x (C6711, C6711B, C6711C,

Contextual Info: TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SPRS088M − FEBRUARY 1999 − REVISED FEBRUARY 2005 D Excellent-Price/Performance Floating-Point D D D D D Digital Signal Processors DSPs : TMS320C67x (C6711, C6711B, C6711C,

TMS320C6711

Abstract: TMS320C6711B TMS320C6711C TMS320C6711D
Contextual Info: TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SPRS088M − FEBRUARY 1999 − REVISED FEBRUARY 2005 D Excellent-Price/Performance Floating-Point D D D D D Digital Signal Processors DSPs : TMS320C67x (C6711, C6711B, C6711C,

Contextual Info: SM320C6711ĆEP, SM320C6711BĆEP, SM320C6711CĆEP, SM320C6711DĆEP FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SGUS054A − AUGUST 2004 − REVISED SEPTEMBER 2005 D Controlled Baseline D D D D D D D D L1/L2 Memory Architecture − One Assembly/Test Site, One Fabrication

Contextual Info: SM320C6711ĆEP, SM320C6711BĆEP, SM320C6711CĆEP, SM320C6711DĆEP FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SGUS054A − AUGUST 2004 − REVISED SEPTEMBER 2005 D Controlled Baseline D D D D D D D D L1/L2 Memory Architecture − One Assembly/Test Site, One Fabrication

Contextual Info: SM320C6711ĆEP, SM320C6711BĆEP, SM320C6711CĆEP, SM320C6711DĆEP FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SGUS054A − AUGUST 2004 − REVISED SEPTEMBER 2005 D Controlled Baseline D D D D D D D D L1/L2 Memory Architecture − One Assembly/Test Site, One Fabrication

acf4518

Abstract: TMS320C6711 TMS320C6711B TMS320C6711C TMS320C6711D TMS320C64 TMS320C6711BGFN150
Contextual Info: TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SPRS088J − FEBRUARY 1999 − REVISED JANUARY 2004 D Excellent-Price/Performance Floating-Point D D D D D Digital Signal Processors DSPs : TMS320C67x (C6711, C6711B, C6711C,

Contextual Info: SM320C6711ĆEP, SM320C6711BĆEP, SM320C6711CĆEP, SM320C6711DĆEP FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SGUS054A − AUGUST 2004 − REVISED SEPTEMBER 2005 D Controlled Baseline D D D D D D D D L1/L2 Memory Architecture − One Assembly/Test Site, One Fabrication

Contextual Info: SM320C6711ĆEP, SM320C6711BĆEP, SM320C6711CĆEP, SM320C6711DĆEP FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SGUS054A − AUGUST 2004 − REVISED SEPTEMBER 2005 D Controlled Baseline D D D D D D D D L1/L2 Memory Architecture − One Assembly/Test Site, One Fabrication

320C6711

Contextual Info: SM320C6711ĆEP, SM320C6711BĆEP, SM320C6711CĆEP, SM320C6711DĆEP FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SGUS054A − AUGUST 2004 − REVISED SEPTEMBER 2005 D Controlled Baseline D D D D D D D D L1/L2 Memory Architecture − One Assembly/Test Site, One Fabrication

ADSP2171KS133

Abstract: ADSP-2172 C1984 80C51 ADSP-2100 ADSP-2101 ADSP-2171 ADSP-2173 HD15 D2322
Contextual Info: a DSP Microcomputer ADSP-2171/ADSP-2172/ADSP-2173 FEATURES 30 ns Instruction Cycle Time 33 MIPS from 16.67 MHz Crystal at 5.0 V 50 ns Instruction Cycle Time (20 MIPS) from 10 MHz Crystal at 3.3 V ADSP-2100 Family Code & Function Compatible with New Instruction Set Enhancements for Bit Manipulation Instructions, Multiplication Instructions, Biased

cpcap motorola 3.2 51

Abstract: f3a14
Contextual Info: MOTOROLA Order Number: DSP56301/D Rev. 4, 10/2001 Semiconductor Products Sector Technical Data DSP56301 24-Bit General-Purpose Digital Signal Processor The DSP56301 is a member of the DSP56300 core family of programmable CMOS Digital Signal Processors DSPs . This family uses a high-performance, single clock cycle per instruction engine providing a twofold

82353

Abstract: intel 82358 82359 82353 intel intel 82353 82358DT
Contextual Info: 82353 ADVANCED DATA PATH • Dual Port Architecture Allows Host to Access Memory without Incurring EISA Arbitration ■ Provides Optimal i486 Burst Performance ■ High Performance, Flexible Memory Support: — Designed as a 16-Bit Slice which Interfaces 16, 32, or 64-Bit Memory