HP70841B Search Results

M16A

Abstract: RG-142 DS90CP22 DS90CP22M-8 HP70841B
Contextual Info: DS90CP22 2X2 800 Mbps LVDS Crosspoint Switch General Description Features DS90CP22 is a 2x2 crosspoint switch utilizing LVDS Low Voltage Differential Signaling technology for low power, high speed operation. Data paths are fully differential from input to output for low noise generation and low pulse width

PMC-2060488

Abstract: HDMP-1022G HDMP-1032AG
Contextual Info: Notice – PMC Product Support Scope for Specified HDMP Part Numbers AM November 21, 2006 12 :2 7: 57 Notice – PMC Product Support Scope for Specified HDMP Part Numbers 07 Distribution: 20 This notice has been added to the front of the datasheets for the “Devices Affected” listed below.

HP83483A

Abstract: DS101053 EIA-644-1995 HP70004A
Contextual Info: DS90CP22 2X2 800 Mbps LVDS Crosspoint Switch General Description Features DS90CP22 is a 2x2 crosspoint switch utilizing LVDS Low Voltage Differential Signaling technology for low power, high speed operation. Data paths are fully differential from input to output for low noise generation and low pulse width distortion. The non-blocking design allows connection of any input

R114426

Abstract: BLM11P300S dipsw_4 232270296001 433003036301 Philips 2322-702-96001 BLM11P300 AN99071 STM16 TP97036
Contextual Info: APPLICATION NOTE OM5808 demoboard negative supply for 2.5 Gb/s TZA3014 / TZA3019 with HBCC package AN99071 TP97036.2/F5.5 Philips Semiconductors OM5808 demoboard negative supply for 2.5 Gb/s TZA3014 / TZA3019 with HBCC package Application Note AN99071 Abstract

CK 1636

Abstract: ethernet parallel converter
Contextual Info: í m HEWLETT PACKARD Gigabit Ethernet Transceiver Chip Preliminary Rev 1.23 04-22-97 , Subject to change without notice Features • IEEE 802.3z Gbit Ethernet compatible, Supports 1250 MBd Gigabit Ethernet • Based on X3T11 “10 bit specification” • Low Power Consumption

HP70311A

Abstract: 0.1 microfarad capacitor hard drive CIRCUIT diagram
Contextual Info: Port Bypass Circuits for Fibre Channel Arbitrated Loop Standard and its Extensions Technical Data HDMP-0421 Single PBC & CDR Features Description • Supports ANSI X3T11 1.0625 Gbps FC-AL Loop Configuration • Supports 802.3z 1.25 Gbps Gigabit Ethernet GE Rates

HP-1668

Abstract: HP8157A lm385 IC circuit diagram SC Duplex Jumper
Contextual Info: 2488 Mb/s Single Mode Fiber Transceiver for SONET OC-48/SDH STM-16 and ATM Technical Data HFCT-5402D Features Applications • 1300 nm Single Mode Transceiver for SONET/SDH Short Reach Links • Compliant with proposed ATM Forum 2488 Mb/s Physical Layer Specification

R114426

Abstract: BLM11P300S 3006P 201 PHILIPS 433003036301 Philips 2322-702-96001 433003036301 dipsw_4 HLMP6500-011 siemens c45 Stocko R5
Contextual Info: APPLICATION NOTE OM5809 demo board positive supply for 2.5 Gb/s TZA3014 / TZA3019 with HBCC package AN01023 TP97036.2/F5.5 Philips Semiconductors OM5809 demo board positive supply for 2.5 Gb/s TZA3014 / TZA3019 with HBCC package Application Note AN01023 Abstract

Contextual Info: Characterization Report on Fiber Optic “Light to Logic” Receiver with Clock Recovery Application Note 1153 RGR2622 Introduction Summary The RGR2622 receiver is a high performance, cost effective module for serial optical data communications applications

FREE MM 5402 SCHEMATIC

Abstract: NS-106
Contextual Info: 2488 Mb/s Single Mode Fiber Transceiver for SONET OC-48/SDH STM-16 and ATM Technical Data HFCT-5402D Features Applications • 1300 nm Single Mode Transceiver for SONET/SDH Short Reach Links • Compliant with proposed ATM Forum 2488 Mb/s Physical Layer Specification

Contextual Info: Characterization Report on 622 Mb/s Single Mode Fiber Transceiver for ATM, SONET OC-12/SDH STM-4 I4.1 Application Note 1132 HFCT-5208 Introduction Summary The HFCT-5208 transceiver is a high performance, cost effective module for serial optical data communications applications

Thurlby pl154

Abstract: HP54120A PL154
Contextual Info: Characterization Report on Fiber Optic “Light to Logic” Receiver Application Note 1135 RCV1551 Introduction Summary The RCV1551 receiver is a high performance, cost effective module for serial optical data communications applications specified for a signal rate of

HDMP-1526

Abstract: HP70311A HP70841B
Contextual Info: Fibre Channel Transceiver Chip Technical Data HDMP-1526 Transceiver Features • ANSI X3.230-1994 Fibre Channel Compatible FC-0 • Supports Full Speed (1062.5 MBd) Fibre Channel • Conforms to “Fibre Channel 10-Bit Interface” Specification • Transmitter and Receiver

Contextual Info: Fibre Channel Transceiver Chip Technical Data HDMP-1536 Transceiver HDMP-1546 Transceiver Features Description • ANSI X3.230-1994 Fibre Channel Compatible FC-0 • Supports Full Speed (1062.5 MBd) Fibre Channel • Compatible with “Fibre Channel 10-Bit Interface”

Contextual Info: What H E W L E T T mLftM P A C K A R D 2488 Mb/s Single Mode Fiber Transceiver for SONET OC-48/SDH STM-16 and ATM Technical Data HFCT-5402D F eatures Applications • 1300 nm S in gle M ode T ra n sceiver fo r SONET/SDH S hort R each Links • C om pliant w ith p rop osed

HP70004A

Abstract: Signal Path designer HP708
Contextual Info: January 2001 DS90LV001 3.3V LVDS-LVDS Buffer General Description The DS90LV001 LVDS-LVDS Buffer takes an LVDS input signal and provides an LVDS output signal. In many large systems, signals are distributed across backplanes, and one of the limiting factors for system speed is the ’stub length’ or

HDMP-1637A

Contextual Info: Gigabit Ethernet SerDes Circuit with Differential PECL Clock Inputs HDMP-1637A SerDes Features • IEEE 802.3z Gigabit Ethernet Compatible, Supports 1250 MBd Gigabit Ethernet • Based on X3T11 “10 Bit Specification” • Low Power Consumption • 10 mm 64-pin PQFP Package

HARD DISK power supply diagram

Abstract: hard disk CIRCUIT diagram HARD DISK with power supply diagram digital code lock schematic diagram hp70841b HDMP-0452 HP70311A "hard disk drive" pcb hard drive CIRCUIT diagram HDMP-04XX
Contextual Info: Agilent HDMP-0452 Quad Port Bypass Circuit with CDR for Fibre Channel Arbitrated Loops Data Sheet Description The HDMP-0452 is a Quad Port Bypass Circuit PBC with a Clock and Data Recovery (CDR) circuit included. This device minimizes part count, cost and jitter accumulation while repeating incoming signals. Port Bypass Circuits are used

HDMP-1638G

Abstract: HDMP1024G MOFR-8 PMC-2060488 HDMP-1022G HDMP-0451
Contextual Info: Notice – PMC Product Support Scope for Specified HDMP Part Numbers AM November 21, 2006 12 :2 6: 32 Notice – PMC Product Support Scope for Specified HDMP Part Numbers 07 Distribution: 20 This notice has been added to the front of the datasheets for the “Devices Affected” listed below.

prbs generator

Contextual Info: ESI EW 1-eTT miííM H PACKARD Gigabit Ethernet Transceiver Chip Technical Data HDMP-1636 Transceiver HDMP-1646 Transceiver Features • IEEE 802.3z Gbit Ethernet Compatible, Supports 1250 MBd Gigabit Ethernet • Based on X3T11 “10 Bit Specification”

HDMP-1536

Abstract: HDMP-1546 HP70311A HP70841B
Contextual Info: Fibre Channel Transceiver Chip Technical Data HDMP-1536 Transceiver HDMP-1546 Transceiver Features Description • ANSI X3.230-1994 Fibre Channel Compatible FC-0 • Supports Full Speed (1062.5 MBd) Fibre Channel • Compatible with “Fibre Channel 10-Bit Interface”

Contextual Info: HDMP-1638G 12 PM Gigabit Ethernet Transceiver Chip with Dual Serial I/O and Differential PECL Clock Inputs 6 10 :0 9: Data Sheet on te nt T ea This chip is used to build a high speed interface as shown in Figure 1 while minimizing board space, power and cost.

Contextual Info: HDMP-0482G Octal Cell Port Bypass Circuit ,1 ay nd Mo n co In er Pa rtm in An HDMP-0482G may also be used as eight 1:1 buffers, one with a CDR and seven without. For example, an HDMP-0482G may be placed in front of a CMOS ASIC to clean the jitter of the outgoing signal CDR path and

sj300

Abstract: CDX2622 HP70820A PL154 132164 E 131735
Contextual Info: CDX2622 Characterization Report Application Note 1099 CDX2622 Introduction Summary The CDX2622 transceiver is a high performance, cost effective module for serial optical data communications applications specified for a signal rate of 622 Mb/s. It is designed to provide an ATM/SONET/SDH