I960CA Search Results

RC32364

Abstract: 80960CA IDT79RC32364
Contextual Info: Integrated Device Technology, Inc. Achieving Compatibility Between the Intel i960 and the RC32364 Embedded Microprocessor Application Note AN-155 By: Salahuddin Ameer Introduction The IDT79RC32364 is a new low-cost, lowpower member of the Integrated Device Technology, Inc. IDT RISControllerTM series of

BT8233EHFB

Abstract: 5969b l8233
Contextual Info: R O C K W E L L Network access S E M I C O N D U C T O R Bt8233 ATM ServiceSAR with S Y S T E M S xBR Traffic Management datasheet PROVIDING HIGH SPEED MULTIMEDIA CONNECTIONS September 1998 Bt8233 ATM ServiceSAR with xBR Traffic Management The Bt8233 Service Segmentation and Reassembly Controller integrates in a single

i960CA

Abstract: ka 20885 D 80960 EP80960BB atu-3 FF90FF i960 KA/KB Programmers Reference Manual 80960CF 80960RP IQ80960RP
Contextual Info: Getting Started with the 80960 QUICKval Kit i960 Microprocessor Evaluation Kit Order Number: 632708-005 Revision Revision History Date -001 Original Issue. 12/94 -002 80960Hx and PCI80960DP chapters added. Additional examples for all processors added. 12/95

Contextual Info: •R g I992 V96BMC Burst M em ory C ontroller A d v a n ce Inform ation i960 CA Support Product! Features • Interfaces directly to the ¡960 CA • On Chip Memory Address Multiplexer/Drivers • Manages Page Mode Dynamic Memory devices • "Same Row" Address Compare

I960CA

Abstract: CRC10 RS8234 RS8250 on-demand multicast messages
Contextual Info: RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and

I960CA

Abstract: CN8236 CX28250EVM Bt8223
Contextual Info: CN8236 ATM ServiceSAR Plus with xBR Traffic Management The CN8236 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA level 1 or 2 interface with service-specific functions in a single package for AAL0, 3/4, and 5 operations.

schematic diagram atx Power supply 500w

Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
Contextual Info: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455

CN8234

Abstract: BT82
Contextual Info: RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and

tektronix 1241 logic analyzer

Abstract: DISPLAY DOBLE microcontroller based substation monitoring MIL-STD-1553 cable connector 8089 microprocessor pin diagram 74act8990 LED Clock Display DOBLE 80386 programmers manual SMD MARKING CODE l6 csr cambridge development board schematic
Contextual Info: TMS320C31 Embedded Control Technical Brief 1992 Digital Signal Processing Products SPRU083 TMS320C31 Embedded Control Technical Brief Literature Number SPRU083 February 1998 IMPORTANT NOTICE Texas Instruments Incorporated TI reserves the right to make changes to its products or to

74fct861

Contextual Info: NSBMC096-16 -25 -33 Burst Memory Controller General Description Features Y Y Interfaces directly to the i960 CA Integrated Page Cache Management Manages Page Mode Dynamic Memory devices On-chip Memory Address Multiplexer Drivers Supports DRAMs trom 256 kB to 64 MB

V360EPC

Abstract: 1gg7 Extended Sector Remapper V3 Semiconductor V350EPC design of dma controller using vhdl eeprom programmer schematic 24c02 V292PBC V960PBC V961PBC
Contextual Info: Chapter 1 Introduction In a very short period of tim e the PCI bus standard has moved beyond the PC to become the most w idely accepted high-performance bus standard for embedded applications. As a leader in providing chipset solutions for high-end embedded applications, V3 Sem iconductor

BSDE

Abstract: I960CA pinout of bel 187 transistor RS8250 CRC10 RS8234 SCR SN 101
Contextual Info: Advance Information This document contains information on a product under development. The parametric information contains target parameters that are subject to change. RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal

Contextual Info: R O C K W E L L Network access S E M I C O N D U C T O R S Y S T E M S RS8234 ServiceSar with xBR Traffic Management data sheet PROVIDING HIGH SPEED MULTIMEDIA CONNECTIONS Because Communication Matters RS8234 ServiceSAR with xBR Traffic Management ATM Service Segmentation and Reassembly Controller

Contextual Info: 1.0 Product Description 1.1 Introduction The highly integrated CMOS Bt8230 ATM Segmentation and Reassembly Con­ troller Chip SRC combines unique features making it a state-of-the-art ATM controller. At introduction, the Bt8230 will support all requirements contained in

Contextual Info: CN8236 ATM ServiceSAR Plus with xBR Traffic Management The CN8236 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA level 1 or 2 interface with service-specific functions in a single package for AAL0, 3/4, and 5 operations.

Motorola ColdFire 5202

Abstract: AHA3411 AHA3422 AHA3430 AHA3431 MCF5102 R3000 AHA3410
Contextual Info: aha products group AHA Application Note Designer’s Guide for StarLite Family Products: AHA3430, AHA3411, AHA3422, AHA3430 and AHA3431 ANDC16_0106 Comtech EF Data Corporation 1126 Alturas Drive Moscow ID 83843 tel: 208.892.5600 fax: 208.892.5601 www.aha.com

Contextual Info: 1.0 RS8234 Product Overview 1.1 Introduction The RS8234 Service Segmentation and Reassembly Controller Sem'ceSAR delivers a wide range of advanced ATM, AAL, and service-specific features in a highly integrated CMOS package. Some of the RS8234 service-level features provide system designers with

BEL 187 PIN DIAGRAM

Abstract: BT8230 bel 187 phillips syn 7580 I960CA 74ABT16244 74ABT16245 CRC10 CRC-10 CRC32
Contextual Info: Preliminary Information This document contains information on new a product.The parametric information, although not fully characterized, is the result of testing initial devices. Bt8230 L O C A L B U S ATM Segmentation and Reassembly Controller—ATM SAR

I960CA

Abstract: CN8236 CN8236EBG 28236-12 0x940
Contextual Info: CN8236 ATM ServiceSAR Plus with xBR Traffic Management The CN8236 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA level 1 or 2 interface with service-specific functions in a single package for AAL0, 3/4, and 5 operations.

Contextual Info: Chapter 1 Introduction In a very short period of tim e the PCI bus standard has moved beyond the PC to become the most w idely accepted high-perform ance bus standard for embedded applications. As a leader in providing chipset solutions for high-end embedded applications, V3 Sem iconductor

"network interface cards"

Contextual Info: Advance Information This document contains information on a product under development. The parametric information contains target parameters that are subject to change. Printed exclusively for DataRace Bt8230 ATM Segmentation and Reassembly Controller—SRC

intel FPGA

Contextual Info: EDRAM Controller For 25MHz&33MHz Intel Ì960CA/CF Microprocessors Application Note Summary Ramtron's enhanced DRAM EDR4M memory’ is the ideal memory for high performance embedded control systems. • No Wait States During Burst Read Hit ■ Only One Wait State During Burst Read Miss and Burst Write Cycles

RISCwatch

Abstract: Intel i960 401GF 82C59 PowerPC 401 IBM PCi port RISCwatch API
Contextual Info: PCI 9080RDK-960 PCI 9080RDK-401 Features • PCI Version 2.1 compliant boards based on the powerful PCI 9080 Bus Master I/O Accelerator chip with I2O messaging unit in hardware. ■ PCI 9080RDK available for the Intel i960 or the IBM PowerPC 401 processor.

AA10

Abstract: C1995 NSBMC096 NSBMC096-16 NSBMC096VF V96BMC VF132A
Contextual Info: NSBMC096-16 -25 -33 Burst Memory Controller General Description The NSBMC096 Burst Memory Controller is an integrated circuit which implements all aspects of DRAM control for high performance systems using an i960 CA CF SuperScalar Embedded Processor The NSBMC096 is functionally equivalent to the V96BMC TM