JEDEC PACKAGE Search Results

TOSHIBA el suffix

Abstract: jedec MS-012-AC EIA and EIAJ standards jedec EIAJ EIAJ standards FS 20.00 p SOL20 package SOL16-P SOL16 package
Contextual Info: Toshiba LOGIC Part Number Package Types/Suffix Guide Standard Package Type Pin Count JEDEC JEDEC JEDEC EIAJ Type II EIAJ Type I EIAJ Type II EIAJ Type I JEDEC PDIP SOIC 150 mil SOIC 300 mil SOP 200 mil SSOP SSOP TSSOP TSSOP 14,16,20 14,16 20 14,16,20 14,16,20

18013

Contextual Info: SOIC-to-JEDEC TO Adapter FEATURES • 8-position SOIC footprint on the top and a circular, 8-pin JEDEC TO male pin footprint on the bottom. IC now available only in 8-position SOIC packages, can be readily mounted on boards having JEDEC TO thru-hole footprints without having to

SMD Packages

Contextual Info: IPC/JEDEC J-STD-033A July 2002 Supersedes IPC/JEDEC J-STD-033 April 1999 JOINT INDUSTRY STANDARD Handling, Packing, Shipping and Use of Moisture/Reflow Sensitive Surface Mount Devices NOTICE JEDEC standards and publications contain material that has been prepared, reviewed, and approved through the JEDEC Board of

1109814

Contextual Info: SOIC-to-JEDEC TO Adapter FEATURES • 8-position SOIC footprint on the top and a circular, 8-pin JEDEC TO male pin footprint on the bottom. IC now available only in 8-position SOIC packages, can be readily mounted on boards having JEDEC TO thru-hole footprints without having to

FP-80B

Abstract: FP80B HD61602
Contextual Info: Package Information FP-80A Code EIAJ JEDEC FP-80A — — Code EIAJ JEDEC FP-80B — — HD61602 Applicable LSI FP-80B HD64646, HD44780U Applicable LSI 26

HD66710

Contextual Info: Package Information FP-100A Code EIAJ JEDEC FP-100A — — Code EIAJ JEDEC FP-100B — — HD66840F, HD66841F, HD66710 Applicable LSI FP-100B HD66100F Applicable LSI 28

tfp100

Abstract: TFP-100 hd61202 HD61203 HD66850F HD61202-hd61203
Contextual Info: Package Information TFP-100 Code EIAJ JEDEC TFP-100 — — HD66204, HD66205, HD61202, HD61203 Applicable LSI FP-136 Code EIAJ JEDEC FP-136 — — HD66850F Applicable LSI 29

JESD-21C

Abstract: JESD21-C JESD8-15
Contextual Info: JEDEC STANDARD Standard for Definition of ‘CU877 PLL Clock Driver for Registered DDR2 DIMM Applications JESD82-8 JULY 2003 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, reviewed, and

Contextual Info: JEDEC JESD204A data converter interface Technical analysis Rev. 2.1 — 14 October 2011 White paper Document information Info Content Keywords JEDEC JESD204A, High-speed data converters Abstract This report describes the technical details of JEDEC JESD204A interface

A2ND

Contextual Info: JEDEC STANDARD Marking, Symbols, and Labels for Identification of Lead Pb Free Assemblies, Components, and Devices JESD97 MAY 2004 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, reviewed, and

Contextual Info: PACKAGE soie DIAGRAM OUTLINES PACKAGE DIAGRAM OUTLINES SOIC C o n t i n u e d REVISIONS DWG § NOM N MAX T E S 0 18- -1 DWG § JEDEC VARIATION □ AA MIN DWG § S016- JEDEC VARIATION □ AB MIN NOM MAX S020- 2 JEDEC VARIATION T E NOM MAX T E S024- 2 NOM

JESD204

Abstract: GSM transmitter receiver spartan hdmi JESD204A 4bit serializer abstract
Contextual Info: R_10002 Technical analysis of the JEDEC JESD204A data converter interface Rev. 01 — 12 April 2010 Document information Info Content Keywords JEDEC JESD204A, High-speed data converters Abstract Report R_10002 NXP Semiconductors Technical analysis of the JEDEC JESD204A data converter interface

JEDEC J-STD-020C

Abstract: JESD47 Reliability Test Methods for Packaged Devices Infineon moisture sensitive package JESD-47 JESD22-A120 AMD reflow soldering profile BGA J-STD-035 semiconductors cross reference ipc-sm-786A
Contextual Info: IPC/JEDEC J-STD-020C July 2004 Supersedes IPC/JEDEC J-STD-020B July 2002 JOINT INDUSTRY STANDARD Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices Notice IPC and JEDEC Standards and Publications are designed to serve the public

Reflow

Abstract: JEDEC J-STD-020d.1 JEP-140 JEP140 J-STD-035 JESD22-B112 JEDEC J-STD-020d JESD47 JESD22-B108 IPC-020d-5-1
Contextual Info: IPC/JEDEC J-STD-020D.1 March 2008 Supersedes IPC/JEDEC J-STD-020D August 2007 JOINT INDUSTRY STANDARD Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices Notice IPC and JEDEC Standards and Publications are designed to serve the public

IPC 4101A

Abstract: IS410 4101A
Contextual Info: RoHs/WEEE-Compliant SOIC-to-JEDEC TO Adapter FEATURES • Pb-Free RoHs/WEEE-compliant • 8-position SOIC footprint on the top and a circular, 8-pin JEDEC TO can male pin footprint on the bottom. ICs now available only in 8-position SOIC packages can be readily mounted on boards having JEDEC TO thru-hole footprints without having to

HD44780U

Abstract: HD61100A HD61200 HD61103A HD61100 HD66100F TFP-80 80 CODE
Contextual Info: Package Information TFP-80 Code EIAJ JEDEC TFP-80 — — Code EIAJ JEDEC FP-100 — — HD44780U Applicable LSI FP-100 Applicable LSI HD61100A, HD61102, HD61103A, HD66204, HD66205, HD61200, HD61202, HD61203, HD66100F 27

HD61605

Abstract: HD63645 HD44102 FP-80 FP-60A 80 CODE
Contextual Info: Package Information FP-60A Code EIAJ JEDEC FP-60A SC-582-F — Code EIAJ JEDEC FP-80 — — HD44100R Applicable LSI FP-80 Applicable LSI HD61602, HD61603, HD61604, HD61605, HD63645, HD64645, HD44102 25

1N4536

Abstract: 1N3604 1N4606 1N3605 RLS4152 1n4533
Contextual Info: ¥•4 1N 1N Series K /D iodes Series *-r-y * - K Switching Diodes • JEDEC JSfêpp/JEDEC Standards • W f i "yfälSl/Dimensions Unit : mm JEDEC M ftä J H T , t& u sk<T) 1N v U - X ' f e S i i L t t « ? '< r m î < 1N Series conforming to JEDEC Standards are also available so that

AS4C32M16D2

Contextual Info: AS4C32M16D2 512M 32M x 16 bit DDRII Synchronous DRAM (SDRAM) Confidential Advanced (Rev. 1.1, Feb. /2013) Features Overview • JEDEC Standard Compliant  JEDEC standard 1.8V I/O (SSTL_18-compatible)  Power supplies: VDD & VDDQ = +1.8V  0.1V  Supports JEDEC clock jitter specification

LM137

Abstract: A42C
Contextual Info: OM76Q3ST ISOLATED HERMETICTO-257AA ADJUSTABLE VOLTAGE REGULATOR Three Terminal, Adjustable Voltage, 1.5 Amp Precision Negative Regulator In Hermetic JEDEC TO-257AA Package FEATURES • • • • • • • Isolated Hermetic Package, JEDEC TO-257AA Outline

Contextual Info: AS4C32M16D2 512M 32M x 16 bit DDRII Synchronous DRAM (SDRAM) Confidential Advanced (Rev. 1.1, Feb. /2013) Features Overview • JEDEC Standard Compliant  JEDEC standard 1.8V I/O (SSTL_18-compatible)  Power supplies: VDD & VDDQ = +1.8V  0.1V  Supports JEDEC clock jitter specification

IN4001

Abstract: OM7602ST 1N4002 2N5640 LM117 MPS2222 MPS2907 OM7602NT OM803
Contextual Info: OM7602ST ISOLATED HERMETIC TO-257AA ADJUSTABLE VOLTAGE REGULATOR Three Terminal, Adjustable Voltage, 1.5 Amp Precision Positive Regulator In Hermetic JEDEC TO-257AA Package FEATURES • • • • • • • Isolated Hermetic Package, JEDEC TO-257AA Outline

soic 16 Jedec package outline

Abstract: ad 406 MS-013 jedec Package do S0242 2764-3
Contextual Info: PACKAGE soie DIAGRAM O U T L IN E S PACKAGE DIAGRAM O U T L IN E S SOIC C o n ti n u e d REVISIONS DWG § NOM N MAX T E S 0 18- -1 DWG § JEDEC VARIATION □ AA MIN DWG § S016- JEDEC VARIATION □ AB MIN NOM MAX S020- 2 JEDEC VARIATION T E NOM MAX T E

ansi y14.5m-1982 decimal

Abstract: CD 4039 AE ansi y14.5m-1982 decimal .xxxx SSC 9500 MAA 723 pj 299 IC 4033 pin configuration IC CD 4033 pin configuration IC CD 4033 pin diagram tsop 48 PIN
Contextual Info: PACKAGE s o ie DIAGRAM O U T L IN E S PACKAGE SOIC DIAGRAM O U T L IN E S C o n tin u ed REVISIONS DWG § NOM N MAX T E S 0 18- -1 DWG § JEDEC VARIATION □ AA MIN DWG § S016- JEDEC VARIATION □ AB MIN NOM MAX S020- 2 JEDEC VARIATION T E NOM MAX T E