JEDEC PIN1 QFN TAPE & REEL Search Results
JEDEC PIN1 QFN TAPE & REEL Result Highlights (2)
Part | ECAD Model | Manufacturer | Description | Download | Buy |
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LMX2325TMX-G |
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LMX2325 - RoHS - T/R, PLL Freq Synthesizer |
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74AC521SC REEL |
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74AC521 - Identity Comparator, AC Series, 8-Bit, Inverted Output, CMOS |
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JEDEC PIN1 QFN TAPE & REEL Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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ATMEL 740
Abstract: atmel 830 ATMEL Tape and Reel drawing LQFP-44 ATMEL shipping label atmel 0635 ATMEL Tape and Reel QFN-64 QFN-64 atmel 1030 pj 54 diode
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JESD97. 4845C ATMEL 740 atmel 830 ATMEL Tape and Reel drawing LQFP-44 ATMEL shipping label atmel 0635 ATMEL Tape and Reel QFN-64 QFN-64 atmel 1030 pj 54 diode | |
56QN50T18080
Abstract: Senju MO-220-compliant Theta JA of 64-pin BGA 56RGQ senju solder paste MO-220 SN74SSTV16859 IPC-9701 qfn jc jb
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SCEA032 56-Pin 56-terminal MO-220, 56QN50T18080 Senju MO-220-compliant Theta JA of 64-pin BGA 56RGQ senju solder paste MO-220 SN74SSTV16859 IPC-9701 qfn jc jb | |
Solder bar of Senju M705
Abstract: senju M31 GRN360 Senju senju m31 JESD Senju 7100 reflow profile 16QN50T23030 JESD 51-7, ambient measurement qfn 32 land pattern Senju paste 7100
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SCBA017D 14/16/20-terminal MO-241, Solder bar of Senju M705 senju M31 GRN360 Senju senju m31 JESD Senju 7100 reflow profile 16QN50T23030 JESD 51-7, ambient measurement qfn 32 land pattern Senju paste 7100 | |
TPS59611Contextual Info: This device is designed specifically to power IMVP Mobile Processors under a strict disclosure agreement with Intel. The end user must have a current CNDA Agreement in place with Intel. For more information please contact IMVP@list.ti.com. PACKAGE MATERIALS INFORMATION |
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8-Apr-2009 TPS59611RHBR TPS59611RHBT TPS59611 | |
Contextual Info: This device is designed specifically to power IMVP Mobile Processors under a strict disclosure agreement with Intel. The end user must have a current CNDA Agreement in place with Intel. For more information please contact IMVP@list.ti.com. PACKAGE MATERIALS INFORMATION |
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8-Apr-2009 TPS59610RHBR TPS59610RHBT | |
Contextual Info: This device is designed specifically to power IMVP Mobile Processors under a strict disclosure agreement with Intel. The end user must have a current CNDA Agreement in place with Intel. For more information please contact IMVP@list.ti.com. PACKAGE MATERIALS INFORMATION |
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8-Apr-2009 TPS51610IRHBR TPS51610IRHBT TPS51610RHBR TPS51610RHBT | |
TPS59610Contextual Info: This device is designed specifically to power IMVP Mobile Processors under a strict disclosure agreement with Intel. The end user must have a current CNDA Agreement in place with Intel. For more information please contact IMVP@list.ti.com. PACKAGE MATERIALS INFORMATION |
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8-Apr-2009 TPS59610RHBR TPS59610RHBT TPS59610 | |
40spqContextual Info: This device is designed specifically to power IMVP Mobile Processors under a strict disclosure agreement with Intel. The end user must have a current CNDA Agreement in place with Intel. For more information please contact IMVP@list.ti.com. PACKAGE MATERIALS INFORMATION |
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8-Apr-2009 TPS59610RHBR TPS59610RHBT 40spq | |
TI QFN marking
Abstract: TPS59611
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8-Apr-2009 TPS59611RHBR TPS59611RHBT TI QFN marking TPS59611 | |
CDC857-2
Abstract: CY2SSTV857-32
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CY2SSTV857-32 DDR400/PC3200-Compliant CY2SSTV857-32 CDC857-2 | |
CDC857-2
Abstract: CY2SSTV857-32
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CY2SSTV857-32 DDR400/PC3200-Compliant CY2SSTV857-32 CDC857-2 | |
Contextual Info: This device is designed specifically to power IMVP Mobile Processors under a strict disclosure agreement with Intel. The end user must have a current CNDA Agreement in place with Intel. For more information please contact IMVP@list.ti.com. PACKAGE MATERIALS INFORMATION |
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8-Apr-2009 TPS59610RHBR TPS59610RHBT | |
CDC857-2
Abstract: CY2SSTV857-32 QFN "200 pin" PACKAGE
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CY2SSTV857-32 DDR400/PC3200-Compliant CY2SSTV857-32 400-MHz CDC857-2 QFN "200 pin" PACKAGE | |
CDC857-2
Abstract: CY2SSTV857-32 QFN "200 pin" PACKAGE
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CY2SSTV857-32 DDR400/PC3200-Compliant CY2SSTV857-32 400-MHz CDC857-2 QFN "200 pin" PACKAGE | |
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JEDEC MO 224
Abstract: CY2SSTU877 CY2SSTU877BVC-XX CY2SSTU877BVI-XX CY2SSTU877BVI-XXT CY2SSTU877LFC-XX CY2SSTU877LFC-XXT CY2SSTU877LFI-XX JEDEC pin1 qfn tape
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CY2SSTU877 500-MHz, 10-Output 52-ball 40-pin CY2SSTU877 JEDEC MO 224 CY2SSTU877BVC-XX CY2SSTU877BVI-XX CY2SSTU877BVI-XXT CY2SSTU877LFC-XX CY2SSTU877LFC-XXT CY2SSTU877LFI-XX JEDEC pin1 qfn tape | |
FMS2016-001
Abstract: FMS2016-001-TB FMS2016-001-TR FMS2016QFN MIL-HDBK-263 sp4t switch die
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FMS2016-001 2002/95/EC) FMS2016-001 22-A114. MIL-STD-1686 MIL-HDBK-263. FMS2016-001-TR FMS2016-001-TB FMS2016-001-EB FMS2016-001-TB FMS2016-001-TR FMS2016QFN MIL-HDBK-263 sp4t switch die | |
tps5161Contextual Info: This device is designed specifically to power IMVP Mobile Processors under a strict disclosure agreement with Intel. The end user must have a current CNDA Agreement in place with Intel. For more information please contact IMVP@list.ti.com. PACKAGE MATERIALS INFORMATION |
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8-Apr-2009 TPS51610IRHBR TPS51610IRHBT TPS51610RHBR TPS51610RHBT tps5161 | |
CDC857-2
Abstract: CY2SSTV857-32 CY2SSTV857LFI-32
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CY2SSTV857-32 DDR400/PC3200-Compliant CY2SSTV857-32 400-MHz CDC857-2 CY2SSTV857LFI-32 | |
PC3200-CompliantContextual Info: CY2SSTV857-32 Differential Clock Buffer/Driver DDR400/PC3200-Compliant Features Description • Operating frequency: 60 MHz to 230 MHz The CY2SSTV857-32 is a high-performance, low-skew, low-jitter zero-delay buffer designed to distribute differential clocks in high-speed applications. The CY2SSTV857-32 |
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CY2SSTV857-32 DDR400/PC3200-Compliant 400-MHz CDC857-2 48-pin CY2SSTV857-32 250MHz 230MHz PC3200-Compliant | |
TSC2020Contextual Info: TSC2020 SBAS536B – FEBRUARY 2011 – REVISED MARCH 2011 www.ti.com Analog Matrix TOUCH SCREEN CONTROLLER with I2C Serial Interface for 3 x 5 Array Check for Samples: TSC2020 FEATURES APPLICATIONS • • • • • • 1 23 • • • • • • • |
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TSC2020 SBAS536B 12-Bit TSC2020 | |
TI QFN markingContextual Info: TSC2020 SBAS536B – FEBRUARY 2011 – REVISED MARCH 2011 www.ti.com Analog Matrix TOUCH SCREEN CONTROLLER with I2C Serial Interface for 3 x 5 Array Check for Samples: TSC2020 FEATURES APPLICATIONS • • • • • • 1 23 • • • • • • • |
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TSC2020 SBAS536B 12-Bit TI QFN marking | |
Contextual Info: TSC2020 SBAS536B – FEBRUARY 2011 – REVISED MARCH 2011 www.ti.com Analog Matrix TOUCH SCREEN CONTROLLER with I2C Serial Interface for 3 x 5 Array Check for Samples: TSC2020 FEATURES APPLICATIONS • • • • • • 1 23 • • • • • • • |
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TSC2020 SBAS536B 12-Bit | |
lf24a
Abstract: fs211 CY2544FI CY2544 CY2546
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CY2544 CY2546 nineY2546 CY2544 CY2546 lf24a fs211 CY2544FI | |
FMS2016-005-TB
Abstract: FMS2016-005TR FMS2016-005 FMS2016-005-TR FMS2016QFN MIL-HDBK-263
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FMS2016-005 2002/95/EC) FMS2016-005 22-A114. MIL-STD-1686 MIL-HDBK-263. FMS2016-005-TR FMS2016-005-TB FMS2016-005-EB FMS2016-005-TB FMS2016-005TR FMS2016-005-TR FMS2016QFN MIL-HDBK-263 |