JESD51 Search Results

Contextual Info: AN10874 LFPAK MOSFET 热设计指南 版本 1 — 2011 年 3 月 31 日 应用笔记 文档信息 项目 内容 关键词 LFPAKMOSFET、热分析、设计与性能、散热考虑、热阻、结到环境、结 到底座、散热孔、 JESD51、 SMD、表面贴装、 PCB 设计。

Contextual Info: SN54ABT16501, SN74ABT16501 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS _ SCBS086C - FEBRUARY 1991 - REVISED JANUARY 1997 Members of the Texas Instruments Widebus Family SN54ABT16501 . . . W D PACKAGE SN74ABT16501 . . . DGG OR DL PACKAGE

SN74LVCC4245

Contextual Info: SN74LVCC4245 OCTAL BUS TRANSCEIVER WITH ADJUSTABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS _ SCAS584A - NOVEMBER 1696 - REVISED JANUARY 1997 EPICrM Enhanced-Performance Implanted CMOS Submicron Process DB, DW, OR PW PACKAGE

Contextual Info: SN54ABT16373A, SN74ABT16373A 16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS _ SCBS160C- DECEMBER 1992 - REVISED MAY 1997 Members of the Texas Instruments Widebus Family State-of-the-Art EPIC-llB™ BiCMOS Design Significantly Reduces Power Dissipation

ABT652A

Contextual Info: SN54ABT652A, SN74ABT652A OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS072F – JANUARY 1991 – REVISED MAY 1997 D D D CLKAB SAB OEAB A1 A2 A3 A4 A5 A6 A7 A8 GND 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCC CLKBA SBA OEBA B1

Contextual Info: SN54ABT240, SN74ABT240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS098H – JANUARY 1991 – REVISED JANUARY 1997 D D D D SN54ABT240 . . . J OR W PACKAGE SN74ABT240A . . . DB, DW, N, OR PW PACKAGE TOP VIEW 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND 1 20

Contextual Info: SN54ABTR2245, SN74ABTR2245 OCTAL TRANSCEIVERS AND LINE/MEMORY DRIVERS WITH 3-STATE OUTPUTS SCBS680A – MARCH 1997 – REVISED MAY 1997 D D D D D SN54ABTR2245 . . . J PACKAGE SN74ABTR2245 . . . DB, DGV, DW, N, OR PW PACKAGE TOP VIEW DIR A1 A2 A3 A4 A5 A6

abt244a

Abstract: Texas Instruments Power Supply
Contextual Info: SN54ABT241, SN74ABT241A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS184D – JANUARY 1991 – REVISED JANUARY 1997 D D D D SN54ABT241 . . . J OR W PACKAGE SN74ABT241A . . . DB, DW, N, OR PW PACKAGE TOP VIEW 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND 1 20

Contextual Info: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590 – DECEMBER 1997 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps

Contextual Info: SN54ABT2245, SN74ABT2245 OCTAL TRANSCEIVERS AND LINE/MOS DRIVERS WITH 3-STATE OUTPUTS SCBS234D – SEPTEMBER 1992 – REVISED MAY 1997 D D D D D DIR A1 A2 A3 A4 A5 A6 A7 A8 GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OE B1 B2 B3 B4 B5 B6 B7

Contextual Info: SN54ABT2241, SN74ABT2241 OCTAL BUFFERS AND LINE/MOS DRIVERS WITH 3-STATE OUTPUTS SCBS233B – JANUARY 1991 – REVISED JANUARY 1997 D D D D Output Ports Have Equivalent 25-Ω Series Resistors, So No External Resistors Are Required State-of-the-Art EPIC-ΙΙB  BiCMOS Design

Contextual Info: SN54ABT827, SN74ABT827 10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS159D – JANUARY 1991 – REVISED MAY 1997 D D D D D D D State-of-the-Art EPIC-ΙΙB  BiCMOS Design Significantly Reduces Power Dissipation Flow-Through Architecture Optimizes PCB Layout

Contextual Info: SN54ABTR2245, SN74ABTR2245 OCTAL TRANSCEIVERS AND LINE/MEMORY DRIVERS WITH 3-STATE OUTPUTS SCBS680A – MARCH 1997 – REVISED MAY 1997 D D D D D SN54ABTR2245 . . . J PACKAGE SN74ABTR2245 . . . DB, DGV, DW, N, OR PW PACKAGE TOP VIEW DIR A1 A2 A3 A4 A5 A6

ABT244A

Contextual Info: SN54ABT241, SN74ABT241A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS184D – JANUARY 1991 – REVISED JANUARY 1997 D D D D SN54ABT241 . . . J OR W PACKAGE SN74ABT241A . . . DB, DW, N, OR PW PACKAGE TOP VIEW 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND 1 20

Contextual Info: 240PIN DDR2 533 Registered DIMM 1024MB With 64Mx8 CL4 TS128MQR72V5J Placement Description The TS128MQR72V5J is a 128M x 72bits DDR2-533 Registered DIMM. The TS128MQR72V5J consists of 18 pcs 64Mx8 bits DDR2 SDRAMs in 60 ball FBGA package, 2 pcs register in 96 ball uBGA package, 1 pcs

Contextual Info: 200PIN DDR2 400 SO-DIMM 256MB With 32Mx16 CL3 TS32MSQ64V4M Description Placement The TS32MSQ64V4M is a 32M x 64bits DDR2-400 SO-DIMM. The TS32MSQ64V4M consists of 4pcs 32Mx16its DDR2 SDRAMs in 84 ball FBGA packages and a 2048 bits serial EEPROM on a 200-pin printed

Contextual Info: SN74CB3Q3306A-EP www.ti.com SCDS352 – DECEMBER 2013 Dual FET Bus Switch 2.5-V/3.3-V Low-Voltage High-Bandwidth Bus Switch Check for Samples: SN74CB3Q3306A-EP FEATURES 1 High-Bandwidth Data Path up to 500 MHz(1 5-V-Tolerant I/Os With Device Powered Up or

Contextual Info: TPS7A8300 www.ti.com SBVS197 – MAY 2013 FEATURES DESCRIPTION • • • • The TPS7A8300 low-dropout LDO voltage regulator is designed to power up noise-sensitive components in high-speed communication applications. The very low-noise, 12-µVRMS output minimizes phase noise on

Contextual Info: 214PIN DDR2 533 Micro-DIMM 256MB With 32Mx16 CL4 TS32MMQ64V5M Description Placement The TS32MMQ64V5M is a 32M x 64bits DDR2-533 J Micro-DIMM. The TS32MMQ64V5M consists of 4pcs 32Mx16bits DDR2 SDRAMs in 84 ball FBGA packages and a 2048 bits serial EEPROM on printed circuit board

Contextual Info: 240PIN DDR2 800 Unbuffered DIMM 512MB With 64Mx8 CL5 TS64MLQ64V8J Description Placement The TS64MLQ64V8J is a 64M x 64bits DDR2-800 Unbuffered DIMM. The TS64MLQ64V8J consists of 8 pcs 64Mx8bits DDR2 SDRAMs in 60 ball FBGA packages and a 2048 bits serial EEPROM on a 240-pin printed

Contextual Info: SN54ABT377, SN74ABT377A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE SCBS156E – FEBRUARY 1991 – REVISED JANUARY 1997 D D D D SN54ABT377 . . . J OR W PACKAGE SN74ABT377A . . . DB, DW, N, OR PW PACKAGE TOP VIEW CLKEN 1Q 1D 2D 2Q 3Q 3D 4D 4Q

hp310

Contextual Info: SN65LVDS16, SN65LVP16 SN65LVDS17, SN65LVP17 www.ti.com SLLS625B – SEPTEMBER 2004 – REVISED NOVEMBER 2005 2.5-V/3.3-V OSCILLATOR GAIN STAGE/BUFFERS • FEATURES • • • Low-Voltage PECL Input and Low-Voltage PECL or LVDS Outputs Clock Rates to 2 GHz

Contextual Info: LM3102/LM3102Q SIMPLE SWITCHER Synchronous 1MHz 2.5A Step-Down Voltage Regulator General Description Features The LM3102 Synchronously Rectified Buck Converter features all required functions to implement a highly efficient and cost effective buck regulator. It is capable of supplying 2.5A

SPM0204HE5-PB

Abstract: mems condenser microphone DC-DC REGULATOR MARKING M7 DIODE mic free sound system amplifier circuit diagram TPS65930BZCHR TPS65930
Contextual Info: TPS65930/TPS65920 Integrated Power Management \Audio Codec TPS65930 Only Silicon Revision 1.2 Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not