KM681000CLG Search Results

km681000clg-5l

Abstract: KM681000CLP-7 KM681000CLP-7L KM681000CLT-5L KM681000C KM681000CL KM681000CLI KM681000CL-L KM681000CLP7L
Contextual Info: PRELIMINARY KM681000C Family CMOS SRAM Document Title 128K x8 bit Low Power CMOS Static RAM Revision History History Draft Date Remark 0.0 Initial draft November 22, 1995 Design target 0.1 First revision - Seperate read and write at ICC, ICC1 ICC = ICC1 → Read : 15mA, Write : 35mA

Contextual Info: Advance Information KM681000C Family 128Kx8 bit Low Power CMOS Static RAM CMOS SRAM FEATURE SUMMARY GENERAL DESCRIPTION • Process Technology : 0.4 uM CMOS The • Organization : 128K x 8 • Power Supply Voltage : Single 5V +/-10% SAMSUNG'S advanced CMOS process technology.

0820R

Abstract: KM681000CLG-7L KM681000CLGI-7L 32-TSOP1-R KM681000CLP-7 KM681000CLT-7L KM681000CLG
Contextual Info: PRIORITY KM681000C Family CMOS SRAM Document Titie 128K x8 bit Low Power CMOS Static RAM Revision History Revision No. History Pratt Date Remark 0.0 Initial draft November 22th 1995 Design target 0.1 First revision - Separate read and write at Icc, Icci Icc = Icci - * Read : 15mA, Write : 35mA

KM62256BLG-7

Abstract: K6R4016V1C-FI12 IS62LV1024LL-70T1 K6R4016V1C-TI10 K6R1016C1C-TC12 KM62256BLG7 MT58L32L32PT-7.5 GVT72024A8J-10L K6R4016V1C-FI10 K6R4008V1C-JC12
Contextual Info: ISSI SRAM Cross Reference Important: please read disclaimer on last page Cypress P/N ISSI P/N C7C1334-10AC IS61NW6432-8TQ C7C1334-5AC IS61NW6432-5TQ IS61NW6432-6TQ, C7C1334-7AC IS61NW6432-7TQ C7C1335-5.5AC IS61C632A-5TQ C7C1335-7AC IS61C632A-7TQ C7C1335-8.5AC

km681000clg-7l

Abstract: KM681000CLP-7 KM681000CLT-5L KM681000CLP-7L KM681000CLG KM681000C
Contextual Info: KM681000C Family CMOS SRAM 128K x8 bit Low Power CMOS Static RAM FEATURES G ENERAL DESCRIPTION • Process Technology: Q.4ftm C M O S • Organization: 128Kx8 • Power Supply Voltage : Single 5.0V±1Q% • Low Data Retention Voltage : 2V Mln • three state output and TTL Compatible

KM681000CLP-7L

Abstract: KM681000CLT-5L km681000clg-5l km681000clg-7 KM681000C KM681000CL KM681000CLI KM681000CL-L KM681000CLP7L KM681000CLGI-7
Contextual Info: PRELIMINARY KM681000C Family CMOS SRAM Document Title 128K x8 bit Low Power CMOS Static RAM Revision History History Draft Date Remark 0.0 Initial draft November 22, 1995 Design target 0.1 First revision - Seperate read and write at ICC, ICC1 ICC = ICC1 → Read : 15mA, Write : 35mA