KS54AHCT Search Results

P5E3

Contextual Info: KS54AHCT _ . . KS54AHCT KS74AHCT 540 KS74AHCT 541 Octal Buffers and Line Drivers with 3-States Outputs 2 0 D ip U nit: m m The '5 4 0 and '541 are general purpose high-speed octal line drivers/buf­ fers with 3-state outputs. The inputs and o utputs are located on opposite

74als power consumption

Abstract: BV 501 n915
Contextual Info: KS54AHCT KS74AHCT 257 KS54AHCT _ _ 0 KS74AHCT 258 Quad 2-Line to 1-Line Data Selector/ Multiplexers with 3-State Outputs The '2 5 7 and '2 5 8 multiplex, signals from four-bit data sources to fouroutput data lines in bus organized systems. The data presented at the

SAMSUNG 640

Contextual Info: KS54AHCT _ KS54AHCT KS74AHCT 640 KS74AHCT 643 O ctal Bus Transceivers These high-speed octal bus transceivers are designed for asynchronous two-way communication between data buses. A direction control input DIR controls the flow direction of data. When DIR is high, data flows

Contextual Info: SAMSUNG S EM I C O N D U C T OR INC OH KS54AHCT -f f Q KS74AHCT ‘ U V Ï)ÉJ 7 U 4 1 M 2 0005^70 0 Dual J-K Positivé Edge-Triggered Flip-Flops with Preset and Clear “ “ — ' " T ~H t -on -on FEATURES DESCRIPTION • Function, pin-out, speed and drive compatibility with

Contextual Info: SAMSUNG SEM ICON DUCTOR INC D5 »e J 7 ^ 4 1 4 2 OODbOfib 0 | . 4-Bit Bidirectional Universal Shift Registers KS54AHCT KS74AHCT FEATURES DESCRIPTION • • • • These 4-bit rigisters feature parallel inputs, parallel outputs, J-R serial inputs, shift/load control input, and a direct over­

Contextual Info: SA MSUNG SE MI C O N D U C T OR INC OE KS54AHCT -f/J KS74AHCT l u d I | 7 ^ 4 1 4 5 0005^32 ñ | Triplé 3-Input NAND Gates FEATURES DESCRIPTION • Function, pin-out, speed end drive compatibility with 54/74ALS logic family • Low power consumption characteristic of CMOS

1411D

Abstract: 74142 logic diagram AHCT20
Contextual Info: SAMSUNG SEMICONDUCTOR IN C 02 KS54AHCT 2 ^ KS74AHCT D e | TlbM lM S OGG5 T 41 T J~_ D . - ^ *7 ^ 3 -* f Dual 4-Input NAND Gates FEATURES DESCRIPTION • Function, pin-out, speed and drive compatibility with 54f74ALS logic family • Low power consumption characteristic of CMOS

AHCT597

Contextual Info: W _ SAMSUNG SEM ICO NDU CT OR INC D 5 D e | TTbMlMS □□DbEDS 4 I KS54AHCT £ 0 7 KS74AHCT - ^ 8-Bit Shift-Registers with Input Latches FEATURES DESCRIPTION • 8-Bit Parallel Storage Register Inputs • shift Register has Direct Overiding Load and Clear.

KS74AHCT74

Contextual Info: SAMSUNG SEMICONDUCTOR INC OS *7A 1* KS54AHCT KS74AHCT Dual D-Type Positive-Edge-Triggered Flip-Flops with Preset and Clear DESCRIPTION FEATURES ' • Function, pin-out, speed and drive compatibility with S4/74ALS logic family • Low power consumption characteristic of CMOS

Contextual Info: SAMSUNG S EMI CO ND UCT OR I N C 05 KS54AHCT H O KS74AHCT FEATURES DESCRIPTION • Function, pin-out, speed and drive compatibility with. 54/74ALS logic family • Low power consumption characteristic of C M O S • High-Drive-Current outputs: These devices contain four independent 2-input NOR gates

Contextual Info: SAMSUNG S E M I CONDU CT OR INC 02 KS54AHCT f%£%Qff%iZQ K *7 A A u rT KS74AHCT_ _ DEj| 7 ^ 4 1 4 2 000 b2 20 D Octal Bus Transceivers with Parity Preliminary Specifications FEATURES DESCRIPTION • Bus Transceivers with Inverting Outputs ’658 or True

Contextual Info: SAMSUNG SEMICONDUCTOR INC D5 KS54AHCT KS74AHCT 12 de| ? ^ bm4s o o o s ,i3t, s | t -1 Triple 3-lnpul NAND Gates with Opert-Drain Outputs FEATURES DESCRIPTION • Function, pln-out, speedand drive compatibility with 54I74ALS logic family • Low power consumption characteristic of CMOS

Contextual Info: SAMSUNG SEMICONDUCTOR INC 05 D E ^ T ^ M L M g OOQtlöM C . octal DType Transparent latches KS54AHCT with 3-State Outputs -7^ ^ -0 -7 - 0 KS74AHCT FEATURES DESCRIPTION • 8 latches in a single package • Full parallel access for loading • Function, pinout, speed and drive compabflity with

Contextual Info: SAMSUNG S E M I C O N D U CT O R IN C OH »Ë | 7^4145 KS54AHCT j O E / 1 O  KS74AHCT I * * * ' OOOS'ì'ìO ” 5 ^ ' Quad 3-State Buffers FEATURES DESCRIPTION • Function, pln-out, speed and drive compatibility with 54/74ALS logic .family • Low power consumption characteristic ol CMOS

Contextual Info: S A M S U N G S E M I C O N D U C T O R INC Û5 KS54AHCT Q O Q / G O Æ KS74AHCT Preliminary Specifications FEATURES s - ' » Fu nction ally Equivalent to AMD’s Am29823 and Am29824 • Provides Extra Data Width Necessary. or. W ider A«h dressfbala Paths of Buses with Parity

Contextual Info: SAMSUNG S E M I CO ND UC T OR INC 05 D é JI 7Tfa414_2 D O O b i m 4 .: Octal D’ Type Transparent Latches with 3-State Outputs KS54AHCT KS74AHCT FEATURES DESCRIPTION • 8 latches In a single package » Full parallel access for loading • Function, pin-out, speed and drive compatibility with

16-LINE

Contextual Info: SAMSUNG S E M I C O N D U C T O R INC OS » E l ? cl b 4 m E KS54AHCT « f /r /f KS74AHCT DD0t,D13 L, | 1013 D 4-Line to 16-Line Decoders/Demultiplexers FEATURES DESCRIPTION • Decodes 4 Binary-Coded Inputs Into One of 16 Mutual­ ly Exclusive Outputs • Performs the Demultiplexing Function by Distributing

Contextual Info: KS54AHCT KS74AHCT 640 KS54AHCT KS74AHCT 643 Octal Bus Transceivers These high-speed octal bus transceivers are designed for asynchronous two-way communication between data buses. A direction control input DIR controls the flow direction of data. When DIR is high, data flows

Contextual Info: S A M S U N G S E M I C O N D U C T O R INC "oi D e | 7 ^ 1=4142 O D D b D V D 7 Synchronous 4-Bit Up/Down Binary Counters_ KS54AHCT 1 Q 4 KS74AHCT f ^ # FEATURES DESCRIPTION • Single down/up count control line • Look-ahead circuitry enhances speed of cascaded

Contextual Info: SAMSUNG SE MI CO NDUCT OR INC 02 KS54AHCT f 7 A H 7 K KS74AHCT . I f l f l ' U D E I 7 ^ 4 1 4 2 000fc.04fi 3 | ' D " Hex/Quad D-type Flip-Flops with Clear FEATURES DESCRIPTION • Function, pin-out, speed and drive compatibility with 54/74ALS logic family

Contextual Info: SAMSUNG D e I 7 cib4 1 4 E D D D S n f l S I 995 S E M I C O N D U C T O R INC DE KS54AHCT KS74AHCT 138 • • • • • • • • •• D •- 3-Line to 8-Line Decoders/Demultiplexers FEATURES DESCRIPTION • Designed specifically for high-speed memory

AHCT03

Contextual Info: S A M S U N G S E M I C O N D U C T O R INC OE DE| 7^4142 □ □ □ S c125 S | T-V3-ZÎ KS54AHCT M KS74AHCT w " FEATURES DESCRIPTION • Function, pin-out, speed and drive compatibility with These devices contain four independent 2-input NAND gates with open-drain outputs. Using a suitable pull-up

diode d4c

Abstract: Q193
Contextual Info: SAMSUNG SEMICONDUCTOR INC 02 DEi 7^4145 DOObSa? 3 4‘By~4 Register Files with 3-State Outputs KS54AHCT / ? 7 / | KS74AHCT u FEATURES DESCRIPTION • .Separate Read Write Addressing Permits Simultaneous Reading and Writing • Expandable to 512 Words of 7-bits

Contextual Info: SAMSUNG SE MI CONDU CT OR INC 02 DE | T T b M m S 00DST72 T I " - . - :.••• • ; -r~ y s - KS54AHCT Q C KS74AHCT u u Quad 2-Input Exclusive-OR Gates FEATURES DESCRIPTION • Function, plri-out, speed and drive compatibility with 54/74ALS logic family