LH540202A Search Results

IR2E27A

Abstract: IR2C53 IR2E02 IR2E27 IR2E10 IR3N34 IR2E31A IR2E01 IR2C07 ir2e31
Contextual Info: lndeX Model No. ARM7D CPU Core28,32,33 ARM7DM 28,33 CMOS CMOS CMOS CMOS 76 5A A F G 44 44 44 44 ID1 series ID2 series ID3 seríes ID21K064 ID21K128 ID21K256 ID21K512 ID21M010 ID21M015 ID21M020 ID21M040 ID22K256 ID22K512 ID22M010 ID22M020 ID22M040 ID22M080

ak25

Abstract: 20U20
Contextual Info: MEMORIES FIFO Memories Caoaritv uapacny !Confi Jration «ordsxbits 64 x 8 0.5k 64 x 9 Model No. Supply current Operating Access time Cycle time fWjuancy (ns) MAX. (ns) MIN. Operating Standby (MHz) MAX. (mA) MAX. (mA) MAX. LH5481D/U-25 25 - 45 - LH5481D/U-35

Contextual Info: LH540202 CMOS 1024 X 9 Asynchronous FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Access Times: 15/20/25/35/50 ns • Fast-Fall-Through Time Architecture Based on CMOS Dual-Port SRAM Technology • Input Port and Output Port Have Entirely Independent Timing

Contextual Info: LH540201A/02A FEATURES • Fast Accress Times: 10 ns Flag and Data • Fully Asynchronous Read and Write 5 1 2 x 9 , 1 K x 9 F IF O sion pins are provided, which allow these FIFOs to be expanded in depth without speed penalty. Retransmit capability is provided. Activating the retransmit pin resets

Contextual Info: LH540201A/02A FEATURES • Fast Accress Times: 10 ns Flag and Data • Fully Asynchronous Read and Write sion pins are provided, which allow these FIFOs to be expanded in depth without speed penalty. Retransmit capability is provided. Activating the retransmit pin resets