LINK123 Search Results

Contextual Info: IMST425-X25S 1/4 IL11 * C-MOS 32-BIT RISC PROCESSOR 51 55 60 GND 65 VDD (+5 V) 70 VDD (+5 V) NC 81 75 80 - TOP VIEW - GND 50 VDD (+5 V) 45 NC NC 40 NC NC GND 85 90 95 35 30 NC NC NC NC NC NC 25 GND 20 15 10 5 1 NC 100 VDD (+5 V) NC VDD (+5 V) GND

74F74

Abstract: inmos transputer T225 transputer Inmos t805 FP 8022 74F04 800E 801C T222 T225
Contextual Info: IMS T225 16-bit transputer FEATURES H 16 bit architecture H 33 ns internal cycle time H 30 MIPS peak instruction rate H Debugging support H 4 Kbytes on-chip static RAM H 60 Mbytes/sec sustained data rate to internal memory H 64 Kbytes directly addressable external memory

ic t805

Abstract: IMS T805-F20E inmos transputer inmos transputer T225 T425 T800 t225 Inmos t805 IMS T805-G20E MEMAD11
Contextual Info: SGS-THOMSON IMS T805E •HI 32-bit floating-point transputer - Extended temperature EATURES 32 bit architecture 50 ns internal cycle time 20 MIPS peak instruction rate 2.8 Mflops (peak) instruction rate Pin compatible with IMS T800 Floating Point Unit Debugging support

inmos T414

Abstract: Transputer T414 inmos transputer reference manual T414 inmos transputer link adapter Inmos t4142 Inmos transputer imst414 IMS T414
Contextual Info: mos Reference manual transputer i mos INMOS Limited PO Box 424 Bristol BS99 7DD England Telephone 0272 290861 Telex 444723 INMOS Corporation PO Box 16000 Colorado Springs CO 80935 USA Telephone (303) 630 4000 TWX 910 920 4904 INMOS GmbH Danziger Strasse 2

imst400

Abstract: 25f0 T222 transputer FP 1117 aj T400 clock FP 801 transputer T222 T225 inmos transputer T225
Contextual Info: SGS-THOMSON IMS T225 L K g lT IM M ! 16 -bit transputer EATURES 16 bit architecture 33 ns internal cycle tim e 30 M IPS pea k instruction rate D ebugging support 4 Kbytes on-chip static RAM 60 M bytes/sec sustained data rate to internal m em ory 64 Kbytes directly addressable external m em ory

inmos T414

Abstract: IMS T414 Transputer T414 IMST414 T414 inmos transputer reference manual transputer 7FFFFF84 22FC
Contextual Info: INMOS CORP 10E D | 4aG2b0fl 00G33S0 3 1 Ö nm oS C h a p te r 4 T - ^ ? -/7 -5 7 9 IMS T414 engineering data 107 Powered by ICminer.com Electronic-Library Service CopyRight 2003 IN M O S CORP "T-Vf-/7 * £ 7 40 02 1, 68 0 0 0 3 3 5 1 I I s I

FP 1117 aj

Abstract: a9yv T222 transputer 2BF4 T222 inmos transputer T225 200ppm 2p23 IMST400
Contextual Info: SGS-THOMSON IMS T225E 16-bit transputer - Extended temperature FEATURES • 16 bit architecture ■ 50 ns internal cycle tim e ■ 20 M IPS peak instruction rate ■ D ebugging support ■ 4 Kbytes on-chip sta tic RAM ■ 40 M bytes/sec sustained data rate to internal m em ory

T425

Abstract: T400 T414 T800 T805 inmos transputer T425 T800 transputer IMST425
Contextual Info: IMS T425 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 Debugging support 4 Kbytes on-chip static RAM System Services 100 Mbytes/sec sustained data rate to internal

T225E

Abstract: ST225
Contextual Info: w # S G S -m O M S O N IMS T225E 16-bit transputer - Extended temperature FEATURES • 16 bit architecture ■ 50 ns internal cycle time ■ 20 MIPS peak instruction rate ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 40 Mbytes/sec sustained data rate to internal memory

IMS T414

Abstract: inmos transputer T425 inmos T414 IMST425 T414 inmos transputer reference manual IMS T800 MARK RF01 T425 T800
Contextual Info: / / ,' ï ! I NMOS CORP IDE D I 4 ö 0 2 töfl OOOaSTl 3 I IM S T 425 transputer nnm os Advance Data FEATURES 30 MIPS peak 15 MIPS sustained performance 32 bit architecture IMS T800 & IMS T414-20 hardware/pin compatible 4 Kbytes on chip RAM for 120 Mbytes/sec data rate

Contextual Info: S G S -T H O M S O N S IMS T225E s L lP T M lM i 16-bit transputer - Extended temperature FEATURES H 16 bit architecture H 50 ns internal cycle time H 20 MIPS peak instruction rate H Debugging support H 4 Kbytes on-chip static RAM H 40 Mbytes/sec sustained data rate to internal

TDR-90

Abstract: itr 8012
Contextual Info: FEATURES Full MIL temperature range -55°C to +125°C MIL-STD-883C processing 16 bit architecture with 8.75 MIPS performance 2 Kbytes 57 ns RAM on chip Four 5/10/20 Mbits/sec INMOS serial links 16 bit external memory interface Directly addresses 64 Kbytes at 17,5 Mbytes/sec

inmos t212 transputer

Abstract: T222 transputer transputer T222 series T212 data inmos transputer reference manual 25F3 T212 Inmos T212
Contextual Info: 297 IM S T 212 transputer Uranos The IMS 1222 is recommended for new designs Engineering Data FEATURES 16 bit architecture 50 ns internal cycle time 20 MIPS peak instruction rate Pin compatible with IMS T222 2 Kbytes on-chip static RAM 80 Mbytes/sec sustained data rate to internal memory

74F04

Abstract: 74F74 800E 801C T222 T225 T225E Inmos T222
Contextual Info: IMS T225 16-bit transputer FEATURES 16 bit architecture 33 ns internal cycle time 30 MIPS peak instruction rate Debugging support 4 Kbytes on-chip static RAM 60 Mbytes/sec sustained data rate to internal memory 64 Kbytes directly addressable external memory

AD T805

Abstract: B50R MEMAD11 T805 IMS T805-F25S IMST805 transputer Inmos t805 inmos transputer T225 inmos transputer T425
Contextual Info: 32-bit floating-point transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ 3.6 Mflops (peak) instruction rate ■ ■ Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support

Inmos t805

Abstract: IMS T805-F20E T425 T800 IMST800 21-F5 REAL32
Contextual Info: IMS T805E 32-bit floating-point transputer – Extended temperature FEATURES APPLICATIONS Scientific and mathematical applications High speed multi processor systems High performance graphics processing – HUD/HDD displays Supercomputers Workstations and workstation clusters

t425

Abstract: SGS thomson power schottky 8000000C sgs thomson 23-F1 KJH T6 IMST425 inmos transputer T425
Contextual Info: w # S G S -T H O M S O N IM < 5 , kT # D ïiin g M iiiL iK g T Â E g n e i ,M & _ T 4 2 5 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMST400 and IMS T414

sbl 20100

Abstract: T425-X25S MEMAD11 inmos transputer T425
Contextual Info: ^•7 # DMD g(fii ilL[l(gTO©[i!!in(gI / = T S G S -T H O M S O N IM S T 4 2 5 32-bit transputer FEATURES ■ 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414

CQ 2AF1

Abstract: IMST425 IMS T400 Inmos T222
Contextual Info: 32-bit transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 100 Mbytes/sec sustained data rate to internal

Contextual Info: SGS-THOMSON IMS T225 • H I 16-bit transputer EATURES 16 bit architecture 33 ns internal cycle time 30 MIPS peak instruction rate Debugging support 4 Kbytes on-chip static RAM 60 Mbytes/sec sustained data rate to internal memory 64 Kbytes directly addressable external memory

inmos transputer T225

Abstract: IMST222
Contextual Info: 1 Introduction 1 Introduction The IMS T225 transputer is a 16 bit CMOS microcomputer with 4 Kbytes on-chip RAM for high speed pro­ cessing, an external memory interface and four standard INMOS communication links. The instruction set achieves efficient implementation of high level languages such as ANSI C and provides direct support for

Contextual Info: IMS T225 7 Links Four identical INMOS bi-directional serial links provide synchronised communication between processors and with the outside world. Each link comprises an input channel and output channel. A link between two transputers is implemented by connecting a link interface on one transputer to a link interface on the other

IMST800

Abstract: IMS T800 T800 transputer inmos transputer inmos T414 T800 IMS T414 inmos transputer reference manual Transputer T414 T800 equivalent
Contextual Info: INMOS CORP IDE D | MfiOBbaa QDQ32fia 5 I DffimoS Chapter 3 T - 4 1 - 1 7 -5 7 • IMS T800 engineering data 45 iNnos T - * ¿ 4 - /? - & corp / ioE d | M a o 2 t,aa □ o o 3 5 a ci m | 46 1 Introduction vcc GND C a p P lu s C a p M in u s R eset A n a ly s e

Contextual Info: ’My 22 Chapter 6 IMS T805 transputer mos* Engineering Data FEATURES 32 bit architecture 33 ns internal cycle time 30 MIPS peak instruction rate 4.3 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMST414 Debugging support