LMU217JC25 Search Results

U217

Contextual Info: o . i\\\ Ci •Hi | LMU217 16 x 16 -bit Parallel m u ltip lier □ FV IC E S IN C O R P Q R A T F D FEATURES □ 25 ns W orst-Case M ultiply Time □ Low Power CMOS Technology □ Replaces Cypress CY7C517, IDT 7217L, and AM D Am 29517 □ Single Clock Architecture with

Contextual Info: LMU217 16 x 16-bit Parallel multiplier DEV IC ES IN C O R PO R A TE D FEATURES □ 20 ns W orst-Case M ultiply Time □ Low P ow er CMOS Technology □ Replaces Cypress CY7C517, IDT 7217L, an d AMD Am29517 □ Single Clock A rchitecture w ith Register Enables

Contextual Info: LMU217 16 x 16-bit Parallel multiplier DEVICES INCORPORATED FEATURES □ 20 ns Worst-Case M ultiply Time □ Low Power CMOS Technology □ Replaces Cypress CY7C517, IDT 7217L, and AMD Am29517 □ Single Clock Architecture w ith Register Enables □ Two's Complement, Unsigned, or

LMU217

Abstract: cy7c517 LMU217JC25 LMU217JC35
Contextual Info: LMU217 LMU217 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier 16 x 16-bit Parallel multiplier DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 25 ns Worst-Case Multiply Time ❑ Low Power CMOS Technology ❑ Replaces Cypress CY7C517, IDT 7217L, and AMD Am29517

Contextual Info: LMU217 16 x 16-bit Parallel multiplier DEV IC ES IN C O R PO R A TE D FEATURES □ 20 ns W orst-Case M ultiply Time □ Low P ow er CMOS Technology □ Replaces Cypress CY7C517, IDT 7217L, an d AMD Am29517 □ Single Clock A rchitecture w ith Register Enables

LMU217KMB55

Contextual Info: .»i> JLMU21Z m LMU217 16 x 16-bit Parallel multiplier DEVICES INCORPORATED FEATURES_ □ 20 ns Worst-Case M ultiply Time □ Low Power CMOS Technology □ Replaces Cypress CY7C517, IDT 7217L, and AM D Am29517 □ Single Clock Architecture with

EME-G700A

Contextual Info: LOGIC Devices Green Initiative ROHS Policy LOGIC Devices Incorporated – Green Initiative – Rev. C 4/01/13 1 Table of Contents LOGIC Devices’ Green Initiative . 3

Contextual Info: LMU217 16 x 16-bit Parallel m u ltip lie r DESCRIPTION FEATURES The LMU217 is a high-speed, low pow er 16-bit parallel multiplier. Full m ilitary ambient tem perature range operation is attained by the use of advanced CMOS technology. □ 20 ns W orst-C ase M ultiply Time

LMU217JC45

Abstract: LMU217JC35 CY7C517 LMU217 LMU217JC55 LMU217JC65
Contextual Info: LMU217 LMU217 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier 16 x 16-bit Parallel multiplier DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 20 ns Worst-Case Multiply Time ❑ Low Power CMOS Technology ❑ Replaces Cypress CY7C517, IDT 7217L, and AMD Am29517

CY7C517

Abstract: LMU217 LMU217JC25 LMU217JC35
Contextual Info: LMU217 LMU217 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier 16 x 16-bit Parallel multiplier DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 25 ns Worst-Case Multiply Time ❑ Low Power CMOS Technology ❑ Replaces Cypress CY7C517, IDT 7217L, and AMD Am29517

Contextual Info: LMU217 LMU217 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier 16 x 16-bit Parallel multiplier DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 25 ns Worst-Case Multiply Time ❑ Low Power CMOS Technology ❑ Replaces Cypress CY7C517, IDT 7217L, and AMD Am29517

Contextual Info: LMU217 — — — L □ Low Power CMOS Technology □ Replaces Cypress CY7C517, IDT 7217L, and AMD Am29517 □ Single Clock Architecture with Register Enables □ Tw o’s Complement, Unsigned, or Mixed Operands □ Three-State Outputs □ DECC SMD No. 5962-87686