LOQB Search Results

64172

Contextual Info: IBM11N8645H IBM11N8735H 8M x 64/72 DRAM MODULE Features • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-line Memory Module • System Performance Benefits: -Non buffered for increased performance • 8Mx64, 8Mx72 Extended Data Out Page Mode DIMMs -Reduced noise 35 Vss/Vcc pins

2526N

Abstract: 7476 truth table signetics 2526 pin diagram of 7476 pin diagram of ttl 7476 PIN CONFIGURATION 7476 7x9 decoder 7476 PIN DIAGRAM input and output 7476 PIN DIAGRAM pin diagram decoder 7476
Contextual Info: signotics 64 9 X X 9 ROM STATIC CHARACTER GENERATOR OC OC L ' SILICON GATE MOS 2500 SERES D E SC R IPTIO N PIN C O N F IG U R A T IO N Top View The 2526 is a high speed 5,184-bit Static Read-Only Memory. It may be organized as 64x9x9 fo r use as a char­

Contextual Info: IB M 1 1 M 1 6 4 5 L 1M x 64 DRAM MODULE Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module • 1Mx64 Extended Data Out Page Mode DIMM • Performance: • • • • -60 -70 ;tRAC i RAS Access Time 60ns 70ns ;tcAC 1CAS Access Time 20ns

pin DIAGRAM OF IC 7428

Contextual Info: IBM14N3264 IBM14N6464 High Performance SRAM Modules Features • 256KB and 512KB secondary cache module family for Intel Triton chip set. • Organized as a 32K or 64K x 64 package on a 4.34” x 1.13”, 160-lead, Dual Read-out DIMM • Available in interleaved ¡486/Pentium burst

ADQ36

Contextual Info: = =¥= = — = ’= IBM13N1649NC IBM13N1809NC Preliminary 1M x 64/80 1 Bank Unbuffered SDRAM Module Features • 168 Pin emerging JEDEC Standard, Unbuffered 8 Byte Dual In-line Memory Module • 1Mx64/80 Synchronous DRAM DIMM • Performance: 10 CAS Latency

ET4000AX

Abstract: TSENG LABS MCL POS-100 schematic diagram cga to vga converter PSA b12 5220 Tseng Labs ET4000 IBM schematics 8514a SC11486 tt 6222-1 et4000
Contextual Info: ET4000/W32Ì Graphics Accelerator Data Book G R A P H I C S BY TSENG L A B S Copyright Tseng Labs, Inc. 1993 • to oh ib s o o G o a cn n3 ■ TSENG LABS ET4000/W32Ì DATA BOOK ERRATA Release Date: 10/1/93 10/1/93 Section 2.11.6.3 has been changed to the following:

VMM-700

Contextual Info: VITESSE VSC8110 Data Sheet ATM/SONET/SDH 155/622 Mb/s Transceiver Mux/Demux with Integrated Clock Generation Features • Operates at Either STS-3/STM-1 155.52 Mb/s or STS-12/STM-4 (622.08 Mb/s) Data Rates • Integrated PLL for Clock Generation - No External Components

"power line modem"

Abstract: rx2 G receiver ic remote control NE5050 NE5050N
Contextual Info: Product specification Philips Sem iconductors Linear Products Power line modem NE5050 PIN CONFIGURATION DESCRIPTION The N E5050 is a modem for pow er line, coaxial cable, and twisted-pair com m unications. The m odem in corporates features to overcom e line im pulse noise and line im pedance m odulation. The

Contextual Info: IBM11M1640B 1M X 64 DRAM MODULE Features • Optimized for byte-write non-parity applications • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module • System Performance Benefits: - • 1Mx64 Fast Page Mode DIMM • Performance: -60 -70 Wc RAS Access Time

ns 4203

Contextual Info: IB M 1 1 M 1 6 4 0 L § € = ¥ ! ^ = -= 7 = 1M X 64 DRAM MODULE Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module • 1Mx64 Fast Page Mode DIMM • Performance: -60 -70 Wc i RAS Access Time 60ns 70ns tcAC i CAS Access Time 20ns 25ns

Contextual Info: IBM041813PPL 64K X 18 BURST PIPELINE SRAM Features • 64K x 18 Organization • Registered Addresses, Data Ins, Control sig­ nals, and Outputs • 0.5*1 C M O S Technology • Asynchronous Output Enable • Synchronous Burst Mode of Operation Compati­ ble with i486 and Pentium™ Processors