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    LP2996LQX Search Results

    LP2996LQX Result Highlights (1)

    Part ECAD Model Manufacturer Description Download Buy
    LP2996LQX/NOPB
    		Texas Instruments 1.5A DDR termination regulator with shutdown pin for DDR2 16-WQFN 0 to 125 Visit Texas Instruments Buy

    LP2996LQX Datasheets (5)

    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    LP2996LQX
    		National Semiconductor DDR Termination Regulator Original PDF 457.33KB 18
    LP2996LQX
    		National Semiconductor LP2996 DDR Termination Regulator; Package: LLP; No of Pins: 16 Original PDF 338.5KB 20
    LP2996LQX
    		Texas Instruments LP2996 - DDR Termination Regulator 16-WQFN 0 to 125 Original PDF 1.55MB 26
    LP2996LQX/NOPB
    		National Semiconductor LP2996 DDR Termination Regulator; Package: LLP; No of Pins: 16; Qty per Container: 4500/Reel Original PDF 338.5KB 20
    LP2996LQX/NOPB
    		Texas Instruments LP2996 - DDR Termination Regulator 16-WQFN 0 to 125 Original PDF 1.55MB 26

    LP2996LQX Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    LP2996MX

    Abstract: LP2996
    Contextual Info: LP2996-N www.ti.com SNOSA40I – MAY 2004 – REVISED JUNE 2012 LP2996 DDR Termination Regulator Check for Samples: LP2996-N FEATURES • 1 • • • • • • • 2 Source and sink current Low output voltage offset No external resistors required Linear topology


    Original     		LP2996-N SNOSA40I LP2996 LLP-16 LP2996MX PDF

    51C SOIC8

    Abstract: LP2996MX LP2996
    Contextual Info: LP2996-N www.ti.com SNOSA40J – NOVEMBER 2002 – REVISED MARCH 2013 LP2996-N DDR Termination Regulator Check for Samples: LP2996-N FEATURES DESCRIPTION • • • • • • • • The LP2996-N linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of


    Original     		LP2996-N SNOSA40J LP2996-N WQFN-16 51C SOIC8 LP2996MX LP2996 PDF

    LP2996

    Abstract: LP2996MX LP2998 LP2996LQ LP2996LQX LP2996M LP2996MR LP2996MRX M08A
    Contextual Info: LP2996 DDR Termination Regulator General Description Features The LP2996 linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current


    Original     		LP2996 LP2996 LP2996MX LP2998 LP2996LQ LP2996LQX LP2996M LP2996MR LP2996MRX M08A PDF

    MLT 22 MOSFET AUDIO AMPLIFIER

    Abstract: Hdmi to micro usb wiring diagram LM2687LDX LMS4684LD transistor SMD 12W inverter hdmi CONVERTER SDI IC CAT-5 Sdi IC ADC081S021CISD ds15br400 DP83848k
    Contextual Info: DP83848K PHYTER Mini LS Industrial Temperature Single Port 10/100 Ethernet Transceiver General Description Features The DP83848K addresses the quality, reliability and small • Low-power 3.3V, 0.18µm CMOS technology form factor required for space sensitive applications in • Auto-MDIX for 10/100 Mb/s


    Original     		DP83848K 16-Bit, LQA68A) MLT 22 MOSFET AUDIO AMPLIFIER Hdmi to micro usb wiring diagram LM2687LDX LMS4684LD transistor SMD 12W inverter hdmi CONVERTER SDI IC CAT-5 Sdi IC ADC081S021CISD ds15br400 PDF

    LP2996

    Abstract: LP2996MX LP2996LQ LP2996LQX LP2996M LP2996MR LP2996MRX M08A
    Contextual Info: LP2996 DDR Termination Regulator General Description Features The LP2996 linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current


    Original     		LP2996 LP2996 CSP-9-111S2) LP2996MX LP2996LQ LP2996LQX LP2996M LP2996MR LP2996MRX M08A PDF

    LP2996MX

    Contextual Info: LP2996-N www.ti.com SNOSA40J – NOVEMBER 2002 – REVISED MARCH 2013 LP2996-N DDR Termination Regulator Check for Samples: LP2996-N FEATURES DESCRIPTION • • • • • • • • The LP2996-N linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of


    Original     		LP2996-N SNOSA40J LP2996-N LP2996MX PDF

    LP2996MX

    Contextual Info: LP2996-N www.ti.com SNOSA40J – NOVEMBER 2002 – REVISED MARCH 2013 LP2996-N DDR Termination Regulator Check for Samples: LP2996-N FEATURES DESCRIPTION • • • • • • • • The LP2996-N linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of


    Original     		LP2996-N SNOSA40J LP2996-N LP2996MX PDF

    LP2996 equivalent

    Abstract: LP2996MX LP2996
    Contextual Info: LP2996 DDR Termination Regulator General Description Features The LP2996 linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current


    Original     		LP2996 LP2996 equivalent LP2996MX PDF

    LP2996

    Abstract: LP2996MX LP2996LQ LP2996LQX LP2996M LP2996MR LP2996MRX M08A
    Contextual Info: LP2996 DDR Termination Regulator General Description Features The LP2996 linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current


    Original     		LP2996 LP2996 CSP-9-111S2) CSP-9-111S2. LP2996MX LP2996LQ LP2996LQX LP2996M LP2996MR LP2996MRX M08A PDF

    LP2996

    Abstract: LP2996MX LP2994 LP2996LQ LP2996M LP2996MR LP2996MRX
    Contextual Info: 電流ソースおよび電流シンク 低出力電圧オフセット 外付け抵抗不要 リニア・トポロジー Suspend-to-RAM STR 機能 少ない外付け部品 サーマル・シャットダウン SO-8PSOP-8、LLP-16 パッケージで供給


    Original     		SO-8PSOP-8LLP-16 DS200575-04-JP LP2996 LP2996 DS200575 LP2994 16-Lead LQA16A LP2996MX LP2996LQ LP2996M LP2996MR LP2996MRX PDF

    LP2996

    Abstract: LP2996MX LP2996LQ LP2996LQX LP2996M LP2996MR LP2996MRX M08A
    Contextual Info: LP2996 DDR Termination Regulator General Description Features The LP2996 linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current


    Original     		LP2996 LP2996 LP2996MX LP2996LQ LP2996LQX LP2996M LP2996MR LP2996MRX M08A PDF

    LP2996MX

    Abstract: LP2996
    Contextual Info: LP2996 DDR Termination Regulator General Description Features The LP2996 linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current


    Original     		LP2996 LP2996MX PDF

    LP2996

    Abstract: LP2996M LP2996MX LP2996LQ LP2996LQX LP2996MR LP2996MRX M08A
    Contextual Info: General Description Features The LP2996 linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current


    Original     		LP2996 LP2996 16-Lead LQA16A MRA08A LP2996M LP2996MX LP2996LQ LP2996LQX LP2996MR LP2996MRX M08A PDF

    LP2996

    Abstract: LP2996MX LP2996LQ LP2996LQX LP2996M LP2996MR LP2996MRX M08A
    Contextual Info: LP2996 DDR Termination Regulator General Description Features The LP2996 linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current


    Original     		LP2996 LP2996 LP2996MX LP2996LQ LP2996LQX LP2996M LP2996MR LP2996MRX M08A PDF

    L00006B

    Abstract: 2996m DDA0008A LP2996 equivalent LP2996-N LP2996MX LP2996
    Contextual Info: LP2996-N www.ti.com SNOSA40J – NOVEMBER 2002 – REVISED MARCH 2013 LP2996-N DDR Termination Regulator Check for Samples: LP2996-N FEATURES DESCRIPTION • • • • • • • • The LP2996-N linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of


    Original     		LP2996-N SNOSA40J LP2996-N WQFN-16 L00006B 2996m DDA0008A LP2996 equivalent LP2996MX LP2996 PDF

    LP2996

    Abstract: LP2996MX capacitor 47uF 25V LP2996LQ LP2996LQX LP2996M LP2996MR LP2996MRX M08A
    Contextual Info: LP2996 DDR Termination Regulator General Description Features The LP2996 linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current


    Original     		LP2996 LP2996 LP2996MX capacitor 47uF 25V LP2996LQ LP2996LQX LP2996M LP2996MR LP2996MRX M08A PDF

    LP2996

    Abstract: LP2996MX LP2996LQ LP2996LQX LP2996M LP2996MR LP2996MRX M08A
    Contextual Info: General Description Features The LP2996 linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current


    Original     		LP2996 LP2996 LP2996MX LP2996LQ LP2996LQX LP2996M LP2996MR LP2996MRX M08A PDF

    LP2996MX

    Abstract: LP2996
    Contextual Info: LP2996 LP2996 DDR Termination Regulator Literature Number: SNOSA40H LP2996 DDR Termination Regulator General Description Features The LP2996 linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide


    Original     		LP2996 LP2996 SNOSA40H LP2996MX PDF