LVC169 Search Results

LVC169A

Contextual Info: LVC169A 3.3V CMOS PRESETTABLE SYNCHRONOUS 4-BIT UP/DOWN EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS PRESETTABLE SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTER WITH 5 VOLT TOLERANT I/O FEATURES: – – – – – – – – – – LVC169A The LVC169A is a presettable synchronous binary counter which

ic up/down counter

Abstract: up down counter LVC169A
Contextual Info: LVC169A 3.3V CMOS PRESETTABLE SYNCHRONOUS 4-BIT UP/DOWN EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS PRESETTABLE SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTER WITH 5 VOLT TOLERANT I/O FEATURES: The LVC169A is a presettable synchronous binary counter which

Contextual Info: 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH PAR­ ITY GENERATORS/CHECKERS, 5V TOLERANT I/O FE A T U R E S : - Typical tsK o (Output Skew) < 250ps - ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) - 0.50mm pitch TSSOP package

74LVC05

Abstract: 7400 datasheet 2-input nand gate 74LVC05A LVC1G04 transistor x1 pv 25 inverter board design pv 74ALVC1G04 74ALVCH244 7400 nand gate series 74ALVC1G14
Contextual Info: Selector Guide for ALVC/LVC Products the leading provider of high-performance logic. From single-gate to 32-bit, IDT is your source for ALVC/LVC logic. Today’s designers are developing the most challenging telecommunications, networking and PC products ever designed

LVC169A

Contextual Info: 3.3V CMOS PRESETTABLE SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTER WITH 5 VOLT TOLERANT I/O FEATURES: - 0.5 MICRON CMOS Technology - ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 - 1,27mm pitch SOIC, 0.635mm pitch QSOP,

Contextual Info: LVC16952A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O LVC16952A FEATURES: DESCRIPTION: • Typical tSK o (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

IDT74LVC16901A

Abstract: LVC16901
Contextual Info: LVC16901A 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH PARITY EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH PARITY GENERATORS/CHECKERS, 5V TOLERANT I/O FEATURES: – – – – – – – – – LVC16901A

74LVCV2G66

Contextual Info: Logic Demo Board Kit www.nxp.com 2011 NXP Semiconductors N.V. All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract,

IDT74LVC16901A

Abstract: LVC16901
Contextual Info: LVC16901A 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH PARITY EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH PARITY GENERATORS/CHECKERS, 5V TOLERANT I/O FEATURES: – – – – – – – – – LVC16901A

4.7k Preset

Abstract: SOT763-1 74LVC169 74LVC169D 74LVC169DB 74LVC169PW DHVQFN16 LVC169 SSOP16 TSSOP16
Contextual Info: NXP LVC169 demo board Demonstrate a binary counter for high-speed counting applications This compact demo board makes it easy to evaluate the LVC169, a binary counter with internal look-ahead carry circuitry for cascading in high-speed counting applications.

SO-64

Abstract: LVC16901 LVCH16901
Contextual Info: LVC16901 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH PARITY EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH PARITY GENERATORS/CHECKERS, 5V TOLERANT I/O FEATURES: – – – – – – – – – LVC16901

Contextual Info: 3.3V CMOS PRESETTABLE SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTER WITH 5 VOLT TOLERANT I/O going edge of the clock CP . Outputs (Q0to Q3) of the counters may be preset to a high or low level. A low level at the parallel enable input (PE) disables the counting action and causes the

Contextual Info: LVC16901A 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH PARITY EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH PARITY GENERATORS/CHECKERS, 5V TOLERANT I/O FEATURES: DESCRIPTION: Typical tSK 0 (Output Skew) < 250ps

Contextual Info: LVC169A ADVANCE INFORMATION 3.3V CMOS PRESETTABLE SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTER WITH 5 VOLT TOLERANT I/O going edge of the clock CP . Outputs (Q0 to Q3) of the counters may be preset to a high or low level. A low level at the parallel enable input (PE) disables the counting action and causes the

LVC169A

Contextual Info: LVC169A 3.3V CMOS PRESETTABLE SYNCHRONOUS 4-BIT UP/DOWN EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS PRESETTABLE SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTER WITH 5 VOLT TOLERANT I/O FEATURES: – – – – – – – – – – LVC169A ADVANCE

Contextual Info: LVC16952A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O FEATURES: LVC16952A DESCRIPTION: • Typical tSK o (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

Contextual Info: 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O FE A T U R E S : - Typical - ESD > 2000V per MIL-STD-883, Method 3015; - 0.635mm pitch SSOP, 0.50mm pitch TSSOP tsK o (Output Skew) < 250ps > 200V using machine model (C = 200pF, R = 0)

Contextual Info: jd t Integrated D evice Technology, li e . 3.3V CMOS 16-BIT REGISTEREDTRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O LVC16952A DESCRIPTION: FEATURES: - Typical tsK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

IDT74LVC16952A

Abstract: LVC16952A SO56-2
Contextual Info: LVC16952A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER EXTENDED COMMERCIAL TEMPERATURE RANGE LVC16952A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O FEATURES: – – – – – – – – – DESCRIPTION: Typical tSK 0 (Output Skew) < 250ps