LVC74 Search Results

Contextual Info: LVC74A-Q1 www.ti.com . SCES481C – AUGUST 2003 – REVISED APRIL 2008 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

LC74A

Contextual Info: LVC74A, LVC74A www.ti.com SCAS287T – JANUARY 1993 – REVISED JULY 2013 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET Check for Samples: LVC74A, LVC74A FEATURES DESCRIPTION • • • • The LVC74A dual positive-edge-triggered Dtype flip-flop is designed for 2.7-V to 3.6-V VCC

Contextual Info: 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET, 5 VOLT TOLERANT I/O FEATURES: - 0.5 MICRON CMOS Technology - ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 - 1,27mm pitch SOIC, 0.635mm pitch QSOP,

IDT74LVC74A

Abstract: LVC74A
Contextual Info: LVC74A 3.3V CMOS POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET, 5 VOLT TOLERANT I/O DESCRIPTION FEATURES: – – – – – – – – –

lc74a

Abstract: A115-A C101 SN54LVC74A SN74LVC74A lvc74a
Contextual Info: LVC74A, LVC74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCAS287P – JANUARY 1993 – REVISED SEPTEMBER 2002 3 12 4 11 5 10 6 9 7 8 1D 1CLK 1PRE 1Q 1Q 14 13 2CLR 3 12 2D 4 11 2CLK 5 10 2PRE 9 2Q 6 7 8 1CLK NC 1PRE NC 1Q

LVC74A

Contextual Info: LVC74A 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET, 5 VOLT TOLERANT I/O LVC74A DESCRIPTION: FEATURES: This dual positive-edge-triggered D-type flip-flop is built using advanced

Contextual Info: LVC74A, LVC74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET www.ti.com SCAS287S – JANUARY 1993 – REVISED MAY 2005 • 3 12 4 11 5 10 6 9 7 8 1D 1CLK 1PRE 1Q 1Q 1 14 1D VCC 2CLR 2D 2CLK 2PRE 2Q 2Q LVC74A . . . FK PACKAGE

Contextual Info: LVC74A, LVC74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET www.ti.com SCAS287S – JANUARY 1993 – REVISED MAY 2005 • 3 12 4 11 5 10 6 9 7 8 1D 1CLK 1PRE 1Q 1Q 1 14 1D VCC 2CLR 2D 2CLK 2PRE 2Q 2Q LVC74A . . . FK PACKAGE

CRC4A8

Abstract: hb200 HC1-CSE K30-3C0-SE K30-3CU-E K30-HCO-CSE
Contextual Info: Packaging of Chip Component Automatic Insertion Packaging TAPE AND REEL REEL DIMENSIONS millimeters inches Tape Size A Max. 178 B Min. C D Min. N Min. W T Max. (7) 260 (10) 1.50 (0.059) 13.0±0.50 (0.512±0.020) 20.2 (0.795) 50 (1.969) 10.0±1.50 (0.394±0.059)

Contextual Info: LVC74A-EP DUAL POSITIVE EDGE TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET w w w .t i.c om SCAS751C – DECEMBER 2003 – REVISED SEPTEMBER 2007 FEATURES 1 • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication Site

Contextual Info: LVC74A, LVC74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET www.ti.com SCAS287S – JANUARY 1993 – REVISED MAY 2005 • 3 12 4 11 5 10 6 9 7 8 1D 1CLK 1PRE 1Q 1Q 1 14 1D VCC 2CLR 2D 2CLK 2PRE 2Q 2Q LVC74A . . . FK PACKAGE

Contextual Info: LVC74A-Q1 www.ti.com . SCES481C – AUGUST 2003 – REVISED APRIL 2008 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

Contextual Info: LVC74A, LVC74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET www.ti.com SCAS287S – JANUARY 1993 – REVISED MAY 2005 • 3 12 4 11 5 10 6 9 7 8 1D 1CLK 1PRE 1Q 1Q 1 14 1D VCC 2CLR 2D 2CLK 2PRE 2Q 2Q LVC74A . . . FK PACKAGE

LCV74A

Contextual Info: LVC74A, LVC74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCAS287M – JANUARY 1993 – REVISED MARCH 2002 D 1CLR 1D 1CLK 1PRE 1Q 1Q GND 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q LVC74A . . . FK PACKAGE

SN74LVC74A

Abstract: SN74LVC74AMDREP SN74LVC74AMPWREP SN74LVC74AQDREP SN74LVC74AQPWREP
Contextual Info: LVC74A-EP DUAL POSITIVE EDGE TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS751C – DECEMBER 2003 – REVISED SEPTEMBER 2007 FEATURES 1 • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –40°C

LVC125

Abstract: lvc14 lvc04 LVC74A lvc138a LVC00 lvc04a LVC14A lvc08 LVC08A
Contextual Info: TEXAS INSTRUMENTS Informational Notification of Datasheet Changes to Selected LVC Devices September 25, 1996 Abstract Texas Instruments is reducing the maximum limit on various timing specifications on a selected group of LVC devices. This reduction is within the current specification and no changes were made to the die

Contextual Info: LVC74A-EP DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS751A – DECEMBER 2003 – REVISED AUGUST 2005 FEATURES • • • • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication

Contextual Info: LVC74A-EP DUAL POSITIVE EDGE TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS751C – DECEMBER 2003 – REVISED SEPTEMBER 2007 FEATURES 1 • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –40°C

7054F

Abstract: BC564A HA13563 AC123A HITACHI microcontroller H8 534 manual IC 74LS47 AC538 BC245A 2SK3235 HA13557
Contextual Info: INDEX General General Information Semiconductor Packages Sales Locations Microcontroller Microcontroller General MultiChipModules Smart Card Micro. Overview Micro. Shortform Micro. Hardware Manual Micro. Program. Manual Micro. Application Notes LCD Controller / Driver

Contextual Info: LVC74A 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET, 5 VOLT TOLERANT I/O LVC74A FEATURES: DESCRIPTION: • 0.5 MICRON CMOS Technology

Contextual Info: LVC74A-EP DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS751A – DECEMBER 2003 – REVISED AUGUST 2005 FEATURES • • • • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication

FW82801CAM

Abstract: ICH3-M SERIRQ 82801CAM FW82801CA QB63 FW82801 LVC08 CF9H LVC74
Contextual Info: Intel 82801CAM I/O Controller Hub 3 ICH3-M Specification Update July 2001 Notice: The 82801CAM product may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current characterized errata are documented in this specification update.

LC74A

Abstract: SN74LVC74ADT A115-A C101 SN54LVC74A SN74LVC74A
Contextual Info: LVC74A, LVC74A DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH CLEAR AND PRESET SCAS287S − JANUARY 1993 − REVISED AUGUST 2004 4 11 5 10 6 9 7 8 1D 1CLK 1PRE 1Q 1Q 1 14 2 13 2CLR 3 12 2D 4 11 2CLK 5 10 2PRE 9 2Q 6 7 8 1CLK NC 1PRE NC 1Q

INTEL FW82801BA motherboard

Abstract: FW82801BA motherboard fw82801ba INTEL FW82801BA FW82801BA SL5WK FW82801BA SL5PN INTEL FW82801BA sl5fc motherboard INTEL FW82801BA SL5WK ICH2 sl5pn
Contextual Info: Intel 82801BA I/O Controller Hub 2 ICH2 and Intel® 82801BAM I/O Controller Hub 2 Mobile (ICH2-M) Specification Update November, 2001 Notice: The ICH2 and ICH2-M products may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized