LVCH32373A Search Results

Contextual Info: LVCH32373A 3.3V CMOS 32-BIT ADVANCE TRANSPARENT D-TYPE LATCH INFORMATION WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: - Typical tS K o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

marking code A45

Abstract: marking code B38 RC3740 TSSOP YAMAICHI SOCKET SCEA014 MARKING a47 marking b28 RC3041 RC3715 RC4650
Contextual Info: 32-Bit Logic Families in LFBGA Packages: 96 and 114 Ball Low-Profile Fine-Pitch BGA Packages SCEA014 October 1998 1 2  32-Bit Logic Families in LFBGA Packages: 96 and 114 Ball Low-Profile Fine-Pitch BGA Packages Application Note October 26th, 1998 by: Sylvie Kadivar, Philips Semiconductors

Contextual Info: LVCH32373A 3.3V CMOS 32-BIT ADVANCE TRANSPARENT D-TYPE LATCH INFORMATION WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: - Typical tS K o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

Contextual Info: LVCH32373A 3.3V CMOS 32-BIT ADVANCE TRANSPARENT D-TYPE LATCH INFORMATION WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD FE A T U R E S : - D E S C R IP TIO N : Typical tSK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

RC3041

Abstract: RC3715 RC3740 RC4650 IDT package marking LVCH OREGA
Contextual Info: 32-Bit Logic Families in LFBGA Packages: 96 and 114 Ball Low-Profile Fine-Pitch BGA Packages Application Note October 26th, 1998 by: Sylvie Kadivar, Philips Semiconductors Maria Balian, Texas Instruments Ed Agis, Texas Instruments Valentino Liva, Integrated Device Technology

IDT74LVCH32373A

Abstract: LVCH32373A
Contextual Info: LVCH32373A 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE LVCH32373A 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD FEATURES: DESCRIPTION: • Typical tSK o (Output Skew) < 250ps

IDT74LVCH32373A

Abstract: LVCH32373A DIODE 4d
Contextual Info: LVCH32373A 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH EXTENDED COMMERCIAL TEMPERATURE RANGE LVCH32373A 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD DESCRIPTION: FEATURES: – – – – – – –

Contextual Info: LVCH32373A 3.3V CMOS 32-BIT ADVANCE TRANSPARENT D-TYPE LATCH INFORMATION WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: - Typical t S K o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

Contextual Info: LVCH32373A 3.3V CMOS 32-BIT ADVANCE TRANSPARENT D-TYPE LATCH INFORMATION WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: - Typical tSK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

1d11d

Abstract: IDT74LVCH32373A LVCH32373A bf96 BF961
Contextual Info: LVCH32373A 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH EXTENDED COMMERCIAL TEMPERATURE RANGE LVCH32373A 3.3V CMOS 32-BIT ADVANCE TRANSPARENT D-TYPE LATCH INFORMATION WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD FEATURES: – – – – –

Contextual Info: LVCH32373A 3.3V CMOS 32-BIT ADVANCE TRANSPARENT D-TYPE LATCH INFORMATION WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: - Typical t S K o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

TSSOP YAMAICHI SOCKET

Abstract: TSSOP-56 footprint texas JEDEC Jc-11 mo-205 free IDT marking IDT package marking LVCH JEDEC Jc-11 free OREGA IC280-096-144 marking B44 RC3041
Contextual Info: 32 Bit Logic Families in LFBGA packages: 96 and 114 Balls Low Profile Fine Pitch BGA Packages. Application Note. October 26th, 1998 by: Sylvie Kadivar, Philips Semiconductors Maria Balian, Texas Instruments Ed Agis, Texas Instruments Valentino Liva, Integrated Device Technology

DIODE 4d

Abstract: IDT74LVCH32373A LVCH32373A
Contextual Info: LVCH32373A 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH EXTENDED COMMERCIAL TEMPERATURE RANGE LVCH32373A 3.3V CMOS 32-BIT ADVANCE TRANSPARENT D-TYPE LATCH INFORMATION WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD DESCRIPTION: FEATURES: – –